FPGA & adaptive SoC databook · online editionRev. 2026.10

5AGXB5

AlteraArria VSoC

The 5AGXB5 is an Arria V FPGA from Altera, built on a 28 nm process. It provides 158,491 adaptive logic modules (ALMs) (420,000 logic elements (LEs)), 633,964 flip-flops, 20.1 Mb of block RAM and 1,092 variable-precision DSP blocks. It offers up to 704 user I/O pins and 36 XCVR transceivers at up to 6.5536 Gb/s, with hard PCI Express Gen2 x4 blocks. It is available in 2 packages, from the F1152 (35 × 35 mm) to the F1517 (40 × 40 mm). Designs are built with Altera Quartus Prime.

158,491ALMs
1,092variable-precision DSP blocks
20.1 MbBlock RAM
704Max. user I/O
36Transceivers (6.5536 Gb/s)

Specifications

VendorAltera
FamilyArria V
SeriesArria
Process28 nm
Configuration memorySRAM
Adaptive logic modules (ALMs)158,491
   Logic blockadaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions)
   LUT noteAdaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions
LUT4 equivalent (approx.)≈316,982
Logic elements (LEs)420,000
Flip-flops633,964
Distributed RAM2,532 Kb
Block RAM20.1 Mb (2054 × 10 Kb)
DSP (variable-precision DSP block)1,092
Max. user I/O704
XCVR transceivers36 × 6.5536 Gb/s
PCI Express2× Gen2 x4
Analog / monitorNone
Design toolAltera Quartus Prime

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
F115235 × 351.054424
F151740 × 401.070436

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the 5AGXB5

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
5SGSD4Altera Stratix V135,840 ALMs360K LE1,04418.7 Mb69636 GX 14.1 Gb/sGen3—
EP4S100G4Altera Stratix IV141,440 ALMs354K LE1,02417.7 Mb76948 XCVR/XCVR/XCVR 11.3 Gb/sGen2—
EP4SGX360Altera Stratix IV141,440 ALMs354K LE1,04017.7 Mb90448 XCVR/XCVR 8.5 Gb/sGen2—
XC7VX330TAMD Virtex-7204,000 LUT6326K LC1,12026.4 Mb70028 GTH 13.1 Gb/sGen3—
EP4S40G5Altera Stratix IV212,480 ALMs531K LE1,02420.2 Mb64636 XCVR/XCVR/XCVR 11.3 Gb/sGen2—
EP2AGZ350Altera Arria II139,400 ALMs349K LE1,04016 Mb73424 XCVR 6.375 Gb/sGen2—

Compare side by side: 5AGXB5 vs 5SGSD4, 5AGXB5 vs EP4S100G4, 5AGXB5 vs EP4SGX360, 5AGXB5 vs EP4S40G5.

Compare the 5AGXB5 with up to three other FPGAs.

5AGXB5 quick facts

How many LUTs does the 5AGXB5 have?

The 5AGXB5 has 158,491 adaptive logic modules (ALMs) (420,000 logic elements (les) as published by Altera). Logic block: adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions).

How many DSP blocks does the 5AGXB5 have?

The 5AGXB5 has 1,092 variable-precision DSP blocks and 20.1 Mb of block RAM.

Does the 5AGXB5 have transceivers?

Yes, 36 XCVR transceivers at up to 6.5536 Gb/s.

What are the alternatives to the 5AGXB5?

Devices of similar size in other families include 5SGSD4 (Altera Stratix V), EP4S100G4 (Altera Stratix IV), EP4SGX360 (Altera Stratix IV).

Which software is used to design with the 5AGXB5?

Designs for the 5AGXB5 are built with Altera Quartus Prime.

Other Arria V devices

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
5AGXA128,302 ALMs75K LE2407.8 Mb4169 XCVR 6.5536 Gb/sGen2—
5AGXA358,900 ALMs156K LE39610.3 Mb4169 XCVR 6.5536 Gb/sGen2—
5AGTC358,900 ALMs156K LE39610.3 Mb4167 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXA571,698 ALMs190K LE60011.5 Mb54424 XCVR 6.5536 Gb/sGen2—
5AGZE183,020 ALMs220K LE80011.4 Mb41424 XCVR 12.5 Gb/sGen3—
5AGXA791,680 ALMs242K LE80013.3 Mb54424 XCVR 6.5536 Gb/sGen2—
5AGTC791,680 ALMs242K LE80013.3 Mb54418 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXB1113,208 ALMs300K LE92014.8 Mb70424 XCVR 6.5536 Gb/sGen2—
5ASXB3132,075 ALMs350K LE80916.9 Mb54030 XCVR 6.5536 Gb/sGen2—
5ASTD3132,075 ALMs350K LE80916.9 Mb54046 XCVR/XCVR 10.3125 Gb/sGen2—
5AGZE3135,840 ALMs360K LE1,04418.7 Mb41424 XCVR 12.5 Gb/sGen3—
5AGXB3136,880 ALMs362K LE1,04516.9 Mb70424 XCVR 6.5536 Gb/sGen2—
5AGTD3136,880 ALMs362K LE1,04516.9 Mb70418 XCVR/XCVR 10.3125 Gb/sGen2—
5AGZE5150,960 ALMs400K LE1,09228.1 Mb67436 XCVR 12.5 Gb/sGen3—
5AGXB5158,491 ALMs420K LE1,09220.1 Mb70436 XCVR 6.5536 Gb/sGen2—
5AGZE7169,800 ALMs450K LE1,13933.2 Mb67436 XCVR 12.5 Gb/sGen3—
5ASXB5174,340 ALMs462K LE1,09022.3 Mb54030 XCVR 6.5536 Gb/sGen2—
5ASTD5174,340 ALMs462K LE1,09022.3 Mb54046 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXB7190,240 ALMs504K LE1,15623.6 Mb70436 XCVR 6.5536 Gb/sGen2—
5AGTD7190,240 ALMs504K LE1,15623.6 Mb70426 XCVR/XCVR 10.3125 Gb/sGen2—

Source: Altera Arria V FPGA and SoC Product Table, 2025.12.04. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.