FPGA & adaptive SoC databook · online editionRev. 2026.10

5AGXB7

AlteraArria VSoC

The 5AGXB7 is an Arria V FPGA from Altera, built on a 28 nm process. It provides 190,240 adaptive logic modules (ALMs) (504,000 logic elements (LEs)), 760,960 flip-flops, 23.6 Mb of block RAM and 1,156 variable-precision DSP blocks. It offers up to 704 user I/O pins and 36 XCVR transceivers at up to 6.5536 Gb/s, with hard PCI Express Gen2 x4 blocks. It is available in 2 packages, from the F1152 (35 × 35 mm) to the F1517 (40 × 40 mm). Designs are built with Altera Quartus Prime.

190,240ALMs
1,156variable-precision DSP blocks
23.6 MbBlock RAM
704Max. user I/O
36Transceivers (6.5536 Gb/s)

Specifications

VendorAltera
FamilyArria V
SeriesArria
Process28 nm
Configuration memorySRAM
Adaptive logic modules (ALMs)190,240
   Logic blockadaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions)
   LUT noteAdaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions
LUT4 equivalent (approx.)≈380,480
Logic elements (LEs)504,000
Flip-flops760,960
Distributed RAM2,906 Kb
Block RAM23.6 Mb (2414 × 10 Kb)
DSP (variable-precision DSP block)1,156
Max. user I/O704
XCVR transceivers36 × 6.5536 Gb/s
PCI Express2× Gen2 x4
Analog / monitorNone
Design toolAltera Quartus Prime

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
F115235 × 351.054424
F151740 × 401.070436

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the 5AGXB7

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
EP4S40G5Altera Stratix IV212,480 ALMs531K LE1,02420.2 Mb64636 XCVR/XCVR/XCVR 11.3 Gb/sGen2—
XC7VX330TAMD Virtex-7204,000 LUT6326K LC1,12026.4 Mb70028 GTH 13.1 Gb/sGen3—
EP4S100G5Altera Stratix IV212,480 ALMs531K LE1,02420.2 Mb76948 XCVR/XCVR 11.3 Gb/sGen2—
EP4SGX530Altera Stratix IV212,480 ALMs531K LE1,02420.2 Mb90448 XCVR/XCVR 8.5 Gb/sGen2—
10AX048Altera Arria 10181,790 ALMs629K LE1,36828.1 Mb49236 XCVR 17.4 Gb/sGen3—
XC6VSX315TAMD Virtex-6196,800 LUT6315K LC1,34424.8 Mb72024 GTX 6.6 Gb/sGen2—

Compare side by side: 5AGXB7 vs EP4S40G5, 5AGXB7 vs XC7VX330T, 5AGXB7 vs EP4S100G5, 5AGXB7 vs EP4SGX530, 5AGXB7 vs 10AX048, 5AGXB7 vs XC6VSX315T.

Compare the 5AGXB7 with up to three other FPGAs.

5AGXB7 quick facts

How many LUTs does the 5AGXB7 have?

The 5AGXB7 has 190,240 adaptive logic modules (ALMs) (504,000 logic elements (les) as published by Altera). Logic block: adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions).

How many DSP blocks does the 5AGXB7 have?

The 5AGXB7 has 1,156 variable-precision DSP blocks and 23.6 Mb of block RAM.

Does the 5AGXB7 have transceivers?

Yes, 36 XCVR transceivers at up to 6.5536 Gb/s.

What are the alternatives to the 5AGXB7?

Devices of similar size in other families include EP4S40G5 (Altera Stratix IV), XC7VX330T (AMD Virtex-7), EP4S100G5 (Altera Stratix IV).

Which software is used to design with the 5AGXB7?

Designs for the 5AGXB7 are built with Altera Quartus Prime.

Other Arria V devices

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
5AGXA128,302 ALMs75K LE2407.8 Mb4169 XCVR 6.5536 Gb/sGen2—
5AGXA358,900 ALMs156K LE39610.3 Mb4169 XCVR 6.5536 Gb/sGen2—
5AGTC358,900 ALMs156K LE39610.3 Mb4167 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXA571,698 ALMs190K LE60011.5 Mb54424 XCVR 6.5536 Gb/sGen2—
5AGZE183,020 ALMs220K LE80011.4 Mb41424 XCVR 12.5 Gb/sGen3—
5AGXA791,680 ALMs242K LE80013.3 Mb54424 XCVR 6.5536 Gb/sGen2—
5AGTC791,680 ALMs242K LE80013.3 Mb54418 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXB1113,208 ALMs300K LE92014.8 Mb70424 XCVR 6.5536 Gb/sGen2—
5ASXB3132,075 ALMs350K LE80916.9 Mb54030 XCVR 6.5536 Gb/sGen2—
5ASTD3132,075 ALMs350K LE80916.9 Mb54046 XCVR/XCVR 10.3125 Gb/sGen2—
5AGZE3135,840 ALMs360K LE1,04418.7 Mb41424 XCVR 12.5 Gb/sGen3—
5AGXB3136,880 ALMs362K LE1,04516.9 Mb70424 XCVR 6.5536 Gb/sGen2—
5AGTD3136,880 ALMs362K LE1,04516.9 Mb70418 XCVR/XCVR 10.3125 Gb/sGen2—
5AGZE5150,960 ALMs400K LE1,09228.1 Mb67436 XCVR 12.5 Gb/sGen3—
5AGXB5158,491 ALMs420K LE1,09220.1 Mb70436 XCVR 6.5536 Gb/sGen2—
5AGZE7169,800 ALMs450K LE1,13933.2 Mb67436 XCVR 12.5 Gb/sGen3—
5ASXB5174,340 ALMs462K LE1,09022.3 Mb54030 XCVR 6.5536 Gb/sGen2—
5ASTD5174,340 ALMs462K LE1,09022.3 Mb54046 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXB7190,240 ALMs504K LE1,15623.6 Mb70436 XCVR 6.5536 Gb/sGen2—
5AGTD7190,240 ALMs504K LE1,15623.6 Mb70426 XCVR/XCVR 10.3125 Gb/sGen2—

Source: Altera Arria V FPGA and SoC Product Table, 2025.12.04. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.