XCKU035

AMDKintex UltraScale

The XCKU035 is a Kintex UltraScale FPGA from AMD, built on a 20 nm process. It provides 203,128 LUT6 look-up tables (444,000 system logic cells), 406,256 flip-flops, 19 Mb of block RAM and 1,700 DSP slices. It offers up to 520 user I/O pins and 16 GTH/GTY transceivers at up to 16.3 Gb/s, with hard PCI Express Gen3 blocks. It is available in 4 packages, from the A784 (23 × 23 mm) to the A1156 (35 × 35 mm). Temperature grades: commercial, extended, industrial. Designs are built with AMD Vivado.

203,128LUTs (LUT6)

1,700DSP slices

19 MbBlock RAM

520Max. user I/O

16Transceivers (16.3 Gb/s)

Specifications

Vendor	AMD
Family	Kintex UltraScale
Series	UltraScale
Process	20 nm
Configuration memory	SRAM
Look-up tables (LUT6)	203,128
Logic block	6-input look-up table, fracturable into two LUT5 with shared inputs
LUT4 equivalent (approx.)	≈325,005
System logic cells	444,000
Flip-flops	406,256
Distributed RAM	5,908 Kb
Block RAM	19 Mb (540 × 36 Kb)
DSP (DSP slice)	1,700
Clock management tiles	10

Max. user I/O	520
HP I/O	416
Differential pairs	240
GTH/GTY transceivers	16 × 16.3 Gb/s
PCI Express	2× Gen3
Analog / monitor	System Monitor
Design tool	AMD Vivado

Packages

Package	Size (mm)	Pitch (mm)	User I/O	Transceivers
A784	23 × 23	0.8	468	8
A676	27 × 27	1.0	312	16
A900	31 × 31	1.0	468	16
A1156	35 × 35	1.0	520	16

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature grade	Junction range	Speed grades
Commercial (C)	0 to 85 °C	-1
Extended (E)	0 to 100 °C	-2, -3
Industrial (I)	−40 to 100 °C	-1, -1L, -2

Alternatives to the XCKU035

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
XC7K410TAMD Kintex-7	254,200 LUT6	407K LC	1,540	27.9 Mb	500	16 GTX 12.5 Gb/s	Gen2	—
XC7K355TAMD Kintex-7	222,600 LUT6	356K LC	1,440	25.1 Mb	300	24 GTX 12.5 Gb/s	Gen2	—
XCKU3PAMD Kintex UltraScale+	163,000 LUT6	356K SLC	1,368	12.7 Mb	304	16 GTY 32.75 Gb/s	Gen3	—
LAV-AT-G50Lattice Avant-G	255,000 LUT4	409K LC	1,120	22.7 Mb	298	16 SERDES 12.5 Gb/s	—	—
LAV-AT-X50Lattice Avant-X	255,000 LUT4	409K LC	1,120	22.7 Mb	298	16 SERDES 25 Gb/s	—	—
MPF300TMicrochip PolarFire	300,000 LUT4	300K LE	924	18.6 Mb	512	16 SERDES 12.7 Gb/s	Gen2	882 polarfireeval

Compare side by side: XCKU035 vs XC7K410T, XCKU035 vs XC7K355T, XCKU035 vs XCKU3P.

Compare the XCKU035 with up to three other FPGAs.

XCKU035 quick facts

How many LUTs does the XCKU035 have?

The XCKU035 has 203,128 LUT6 look-up tables (444,000 system logic cells as published by AMD). Logic block: 6-input look-up table, fracturable into two LUT5 with shared inputs.

How many DSP blocks does the XCKU035 have?

The XCKU035 has 1,700 DSP slices and 19 Mb of block RAM.

Does the XCKU035 have transceivers?

Yes, 16 GTH/GTY transceivers at up to 16.3 Gb/s.

What are the alternatives to the XCKU035?

Devices of similar size in other families include XC7K410T (AMD Kintex-7), XC7K355T (AMD Kintex-7), XCKU3P (AMD Kintex UltraScale+).

Which software is used to design with the XCKU035?

Designs for the XCKU035 are built with AMD Vivado.

Other Kintex UltraScale devices

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
XCKU025	145,440 LUT6	318K SLC	1,152	12.7 Mb	312	12 GTH/GTY 16.3 Gb/s	Gen3	—
XCKU035	203,128 LUT6	444K SLC	1,700	19 Mb	520	16 GTH/GTY 16.3 Gb/s	Gen3	—
XCKU040	242,400 LUT6	530K SLC	1,920	21.1 Mb	520	20 GTH/GTY 16.3 Gb/s	Gen3	1,024 hpc_ku
XCKU060	331,680 LUT6	726K SLC	2,760	38 Mb	624	32 GTH/GTY 16.3 Gb/s	Gen3	—
XCKU085	497,520 LUT6	1088K SLC	4,100	57 Mb	676	56 GTH/GTY 16.3 Gb/s	Gen3	—
XCKU095	537,600 LUT6	1176K SLC	768	59.1 Mb	702	64 GTH/GTY 16.3 Gb/s	Gen3	—
XCKU115	663,360 LUT6	1451K SLC	5,520	75.9 Mb	832	64 GTH/GTY 16.3 Gb/s	Gen3	—

Source: AMD UltraScale FPGAs Product Selection Guide, XMP102 (v1.7). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.