XCKU115
AMDKintex UltraScaleThe XCKU115 is a Kintex UltraScale FPGA from AMD, built on a 20 nm process. It provides 663,360 LUT6 look-up tables (1,451,000 system logic cells), 1,326,720 flip-flops, 75.9 Mb of block RAM and 5,520 DSP slices. It offers up to 832 user I/O pins and 64 GTH/GTY transceivers at up to 16.3 Gb/s, with hard PCI Express Gen3 blocks. It is available in 7 packages, from the A1517 (40 × 40 mm) to the B2104 (47.5 × 47.5 mm). Temperature grades: commercial, extended, industrial. Designs are built with AMD Vivado.
Specifications
| Vendor | AMD |
|---|---|
| Family | Kintex UltraScale |
| Series | UltraScale |
| Process | 20 nm |
| Configuration memory | SRAM |
| Look-up tables (LUT6) | 663,360 |
| Logic block | 6-input look-up table, fracturable into two LUT5 with shared inputs |
| LUT4 equivalent (approx.) | ≈1,061,376 |
| System logic cells | 1,451,000 |
| Flip-flops | 1,326,720 |
| Distributed RAM | 18,360 Kb |
| Block RAM | 75.9 Mb (2160 × 36 Kb) |
| DSP (DSP slice) | 5,520 |
| Clock management tiles | 24 |
| Max. user I/O | 832 |
|---|---|
| HP I/O | 676 |
| Differential pairs | 384 |
| GTH/GTY transceivers | 64 × 16.3 Gb/s |
| PCI Express | 6× Gen3 |
| Analog / monitor | System Monitor |
| Design tool | AMD Vivado |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| A1517 | 40 × 40 | 1.0 | 624 | 48 |
| D1517 | 40 × 40 | 1.0 | 338 | 64 |
| B1760 | 42.5 × 42.5 | 1.0 | 702 | 52 |
| A2104 | 47.5 × 47.5 | 1.0 | 832 | 52 |
| B2104 | 47.5 × 47.5 | 1.0 | 702 | 64 |
| D1924 | 45 × 45 | 1.0 | 832 | 52 |
| F1924 | 45 × 45 | 1.0 | 728 | 64 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Commercial (C) | 0 to 85 °C | -1 |
| Extended (E) | 0 to 100 °C | -2, -3 |
| Industrial (I) | −40 to 100 °C | -1, -1L, -2 |
Alternatives to the XCKU115
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| XC7VX980TAMD Virtex-7 | 612,000 LUT6 | 979K LC | 3,600 | 52.7 Mb | 900 | 72 GTH 13.1 Gb/s | Gen3 | 3,040 haps_dx7 |
| XC7VX1140TAMD Virtex-7 | 712,000 LUT6 | 1139K LC | 3,360 | 66.1 Mb | 1,100 | 96 GTH 13.1 Gb/s | Gen3 | — |
| XC7VX690TAMD Virtex-7 | 433,200 LUT6 | 693K LC | 3,600 | 51.7 Mb | 1,000 | 80 GTH 13.1 Gb/s | Gen3 | — |
| GX 2100Altera Stratix 10 GX/SX | 679,680 ALMs | 2005K LE | 3,744 | 127 Mb | 704 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 | — |
| GX 1650Altera Stratix 10 GX/SX | 550,540 ALMs | 1624K LE | 3,145 | 114 Mb | 704 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 | — |
| GX 1100Altera Stratix 10 GX/SX | 449,280 ALMs | 1325K LE | 2,592 | 107 Mb | 688 | 48 XCVR/XCVR 28.3 Gb/s | Gen3 | — |
Compare side by side: XCKU115 vs XC7VX980T, XCKU115 vs XC7VX1140T, XCKU115 vs XC7VX690T.
Compare the XCKU115 with up to three other FPGAs.
XCKU115 quick facts
How many LUTs does the XCKU115 have?
The XCKU115 has 663,360 LUT6 look-up tables (1,451,000 system logic cells as published by AMD). Logic block: 6-input look-up table, fracturable into two LUT5 with shared inputs.
How many DSP blocks does the XCKU115 have?
The XCKU115 has 5,520 DSP slices and 75.9 Mb of block RAM.
Does the XCKU115 have transceivers?
Yes, 64 GTH/GTY transceivers at up to 16.3 Gb/s.
What are the alternatives to the XCKU115?
Devices of similar size in other families include XC7VX980T (AMD Virtex-7), XC7VX1140T (AMD Virtex-7), XC7VX690T (AMD Virtex-7).
Which software is used to design with the XCKU115?
Designs for the XCKU115 are built with AMD Vivado.
Other Kintex UltraScale devices
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| XCKU025 | 145,440 LUT6 | 318K SLC | 1,152 | 12.7 Mb | 312 | 12 GTH/GTY 16.3 Gb/s | Gen3 | — |
| XCKU035 | 203,128 LUT6 | 444K SLC | 1,700 | 19 Mb | 520 | 16 GTH/GTY 16.3 Gb/s | Gen3 | — |
| XCKU040 | 242,400 LUT6 | 530K SLC | 1,920 | 21.1 Mb | 520 | 20 GTH/GTY 16.3 Gb/s | Gen3 | 1,024 hpc_ku |
| XCKU060 | 331,680 LUT6 | 726K SLC | 2,760 | 38 Mb | 624 | 32 GTH/GTY 16.3 Gb/s | Gen3 | — |
| XCKU085 | 497,520 LUT6 | 1088K SLC | 4,100 | 57 Mb | 676 | 56 GTH/GTY 16.3 Gb/s | Gen3 | — |
| XCKU095 | 537,600 LUT6 | 1176K SLC | 768 | 59.1 Mb | 702 | 64 GTH/GTY 16.3 Gb/s | Gen3 | — |
| XCKU115 | 663,360 LUT6 | 1451K SLC | 5,520 | 75.9 Mb | 832 | 64 GTH/GTY 16.3 Gb/s | Gen3 | — |
Source: AMD UltraScale FPGAs Product Selection Guide, XMP102 (v1.7). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.