CCGM1A4
Cologne ChipGateMateThe CCGM1A4 is a GateMate FPGA from Cologne Chip, built on a 28 nm process. It provides 81,920 CPEs (8-input LUT trees), 163,840 flip-flops, 5 Mb of block RAM, with no hard multipliers. It offers up to 154 user I/O pins and 4 SerDes transceivers at up to 5 Gb/s. It comes in a single package, the FBGA324 (15 × 15 mm). Temperature grades: expanded. Designs are built with Yosys + nextpnr (open source).
Specifications
| Vendor | Cologne Chip |
|---|---|
| Family | GateMate |
| Series | GateMate |
| Process | 28 nm |
| Configuration memory | SRAM |
| Programmable elements (CPEs) | 81,920 |
| Logic block | Cologne Chip programmable element: 8-input LUT tree, or two 4-input LUT trees |
| LUT note | Each CPE is an 8-input LUT tree that can also work as two 4-input LUT trees, with two flip-flops/latches |
| LUT4 equivalent (approx.) | ≈163,840 |
| Flip-flops | 163,840 |
| Block RAM | 5 Mb (128 × 40 Kb) |
| DSP (DSP block) | None |
| Clock management tiles | 16 |
| Max. user I/O | 154 |
|---|---|
| Differential pairs | 77 |
| SerDes transceivers | 4 × 5 Gb/s |
| PCI Express | None |
| Analog / monitor | None |
| Design tool | Yosys + nextpnr (open source) |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| FBGA324 | 15 × 15 | 0.8 | 154 | 4 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Expanded (Q) | −40 to 125 °C | — |
Alternatives to the CCGM1A4
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| GW2AN-55Gowin Arora II | 54,720 LUT4 | — | — | 2.5 Mb | 608 | — | — | — |
| GW2AN-18XGowin Arora II | 20,736 LUT4 | — | — | 0.5 Mb | 389 | — | — | — |
| EP4CGX15Altera Cyclone IV | 14,000 LUT4 | 14K LE | — | 0.5 Mb | 72 | 2 XCVR 3.125 Gb/s | Gen2 | — |
| GW2AN-9XGowin Arora II | 10,368 LUT4 | — | — | 0.5 Mb | 389 | — | — | — |
| LFMXO4D-110Lattice MachXO4 | 9,400 LUT4 | 11.3K LC | — | 0.4 Mb | 381 | — | — | — |
| LFMXO4-110Lattice MachXO4 | 9,400 LUT4 | 11.3K LC | — | 0.4 Mb | 382 | — | — | — |
Compare side by side: CCGM1A4 vs GW2AN-55, CCGM1A4 vs GW2AN-18X, CCGM1A4 vs EP4CGX15.
Compare the CCGM1A4 with up to three other FPGAs.
CCGM1A4 quick facts
How many LUTs does the CCGM1A4 have?
The CCGM1A4 has 81,920 CPEs (8-input LUT trees). Logic block: Cologne Chip programmable element: 8-input LUT tree, or two 4-input LUT trees.
How many DSP blocks does the CCGM1A4 have?
The CCGM1A4 has no DSP blocks and 5 Mb of block RAM.
Does the CCGM1A4 have transceivers?
Yes, 4 SerDes transceivers at up to 5 Gb/s.
What are the alternatives to the CCGM1A4?
Devices of similar size in other families include GW2AN-55 (Gowin Arora II), GW2AN-18X (Gowin Arora II), EP4CGX15 (Altera Cyclone IV).
Which software is used to design with the CCGM1A4?
Designs for the CCGM1A4 are built with Yosys + nextpnr (open source).
Other GateMate devices
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| CCGM1A1 | 20,480 CPEs | — | — | 1.2 Mb | 162 | 1 SerDes 5 Gb/s | — | — |
| CCGM1A2 | 40,960 CPEs | — | — | 2.5 Mb | 162 | 2 SerDes 5 Gb/s | — | — |
| CCGM1A4 | 81,920 CPEs | — | — | 5 Mb | 154 | 4 SerDes 5 Gb/s | — | — |
| CCGM1A9 | 184,320 CPEs | — | — | 11.2 Mb | 1,458 | 9 SerDes 5 Gb/s | — | — |
| CCGM1A16 | 327,680 CPEs | — | — | 20 Mb | 2,592 | 16 SerDes 5 Gb/s | — | — |
| CCGM1A25 | 512,000 CPEs | — | — | 31.2 Mb | 4,050 | 25 SerDes 5 Gb/s | — | — |
Source: Cologne Chip GateMate product table, retrieved 2026-10-26. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.