CCGM1A25
Cologne ChipGateMateThe CCGM1A25 is a GateMate FPGA from Cologne Chip, built on a 28 nm process. It provides 512,000 CPEs (8-input LUT trees), 1,024,000 flip-flops, 31.2 Mb of block RAM, with no hard multipliers. It offers up to 4,050 user I/O pins and 25 SerDes transceivers at up to 5 Gb/s. Temperature grades: expanded. Designs are built with Yosys + nextpnr (open source).
Specifications
| Vendor | Cologne Chip |
|---|---|
| Family | GateMate |
| Series | GateMate |
| Process | 28 nm |
| Configuration memory | SRAM |
| Programmable elements (CPEs) | 512,000 |
| Logic block | Cologne Chip programmable element: 8-input LUT tree, or two 4-input LUT trees |
| LUT note | Each CPE is an 8-input LUT tree that can also work as two 4-input LUT trees, with two flip-flops/latches; this device is sold as a bare die (flip-chip) only |
| LUT4 equivalent (approx.) | ≈1,024,000 |
| Flip-flops | 1,024,000 |
| Block RAM | 31.2 Mb (800 × 40 Kb) |
| DSP (DSP block) | None |
| Clock management tiles | 100 |
| Max. user I/O | 4,050 |
|---|---|
| Differential pairs | 2,025 |
| SerDes transceivers | 25 × 5 Gb/s |
| PCI Express | None |
| Analog / monitor | None |
| Design tool | Yosys + nextpnr (open source) |
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Expanded (Q) | −40 to 125 °C | — |
Alternatives to the CCGM1A25
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| AGI 041Altera Agilex 7 I-Series | 1,356,160 ALMs | 4001K LE | — | 335 Mb | 744 | 64 XCVR 116 Gb/s | — | — |
| GW2AN-55Gowin Arora II | 54,720 LUT4 | — | — | 2.5 Mb | 608 | — | — | — |
| GW2AN-18XGowin Arora II | 20,736 LUT4 | — | — | 0.5 Mb | 389 | — | — | — |
| GW2A-55Gowin Arora II | 54,720 LUT4 | — | 40 | 2.5 Mb | 608 | — | — | — |
| 5SGXA7Altera Stratix V | 234,720 ALMs | 622K LE | 256 | 50 Mb | 840 | 48 GX 14.1 Gb/s | Gen3 | 1,568 de5_net |
| 5SGTC7Altera Stratix V | 234,720 ALMs | 622K LE | 256 | 50 Mb | 600 | 36 GT/GX 28.05 Gb/s | Gen3 | — |
Compare side by side: CCGM1A25 vs AGI 041, CCGM1A25 vs GW2AN-55, CCGM1A25 vs GW2AN-18X.
Compare the CCGM1A25 with up to three other FPGAs.
CCGM1A25 quick facts
How many LUTs does the CCGM1A25 have?
The CCGM1A25 has 512,000 CPEs (8-input LUT trees). Logic block: Cologne Chip programmable element: 8-input LUT tree, or two 4-input LUT trees.
How many DSP blocks does the CCGM1A25 have?
The CCGM1A25 has no DSP blocks and 31.2 Mb of block RAM.
Does the CCGM1A25 have transceivers?
Yes, 25 SerDes transceivers at up to 5 Gb/s.
What are the alternatives to the CCGM1A25?
Devices of similar size in other families include AGI 041 (Altera Agilex 7 I-Series), GW2AN-55 (Gowin Arora II), GW2AN-18X (Gowin Arora II).
Which software is used to design with the CCGM1A25?
Designs for the CCGM1A25 are built with Yosys + nextpnr (open source).
Other GateMate devices
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| CCGM1A1 | 20,480 CPEs | — | — | 1.2 Mb | 162 | 1 SerDes 5 Gb/s | — | — |
| CCGM1A2 | 40,960 CPEs | — | — | 2.5 Mb | 162 | 2 SerDes 5 Gb/s | — | — |
| CCGM1A4 | 81,920 CPEs | — | — | 5 Mb | 154 | 4 SerDes 5 Gb/s | — | — |
| CCGM1A9 | 184,320 CPEs | — | — | 11.2 Mb | 1,458 | 9 SerDes 5 Gb/s | — | — |
| CCGM1A16 | 327,680 CPEs | — | — | 20 Mb | 2,592 | 16 SerDes 5 Gb/s | — | — |
| CCGM1A25 | 512,000 CPEs | — | — | 31.2 Mb | 4,050 | 25 SerDes 5 Gb/s | — | — |
Source: Cologne Chip GateMate product table, retrieved 2026-10-26. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.