LFMXO5-65T

LatticeMachXO5-NX

The LFMXO5-65T is a MachXO5-NX FPGA from Lattice, built on a 28 nm process. It provides 54,167 LUT4 look-up tables (65,000 logic cells), 2.2 Mb of block RAM plus 1 Mb of LRAM and 128 18×18 multipliers. It offers up to 371 user I/O pins and 1 SERDES transceivers, with hard PCI Express Gen2 blocks. It is available in 3 packages, from the BBG256 (14 × 14 mm) to the BGA484 (19 × 19 mm). Designs are built with Lattice Radiant.

54.2KLUT4-equivalent

54.2KLUTs (LUT4)

12818×18 multipliers

1 MbLRAM

2.2 MbBlock RAM

371Max. user I/O

1Transceivers

Specifications

Vendor	Lattice
Family	MachXO5-NX
Series	Nexus
Process	28 nm
Configuration memory	Internal flash
LUT4-equivalent capacity	54,167
Look-up tables (LUT4)	54,167
LUT note	Derived from logic cells ÷ 1.2 (Lattice definition for Nexus devices)
Logic cells	65,000
Distributed RAM	300 Kb
Block RAM	2.2 Mb (128 × 18 Kb)
LRAM	1 Mb
User flash memory	21,504 Kb
DSP (18×18 multiplier)	128

Max. user I/O	371
SERDES transceivers	1 (rate not published)
PCI Express	Gen2
Analog / monitor	SAR ADC
Design tool	Lattice Radiant

Packages

Package	Size (mm)	Pitch (mm)	User I/O	Transceivers
BBG256	14 × 14	0.8	173	1
BBG400	17 × 17	0.8	318	—
BGA484	19 × 19	0.8	371	1

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the LFMXO5-65T

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
LFD2NX-65Lattice Certus-NX	54.2K 54.2K LUT4	65K LC	128	2.2 Mb	371	1 SERDES 5 Gb/s	Gen2
T55Efinix Trion	≈54.2K 54.2K LEs	54.2K LE	150	2.7 Mb	278	—	—
XC7S50AMD Spartan-7	52.2K 32.6K LUT6	52.2K LC	120	2.6 Mb	250	—	—
EP4CE55Altera Cyclone IV	56K 56K LUT4	56K LE	154	2.3 Mb	374	—	—
10CL055Altera Cyclone 10 LP	55K 55K LUT4	55K LE	156	2.3 Mb	321	—	—
GW5A-60Gowin Arora V	59.9K 59.9K LUT4	—	118	2.1 Mb	320	—	—

Compare side by side: LFMXO5-65T vs LFD2NX-65, LFMXO5-65T vs T55, LFMXO5-65T vs XC7S50.

LFMXO5-65T quick facts

How many LUTs does the LFMXO5-65T have?

The LFMXO5-65T has 54,167 LUT4 look-up tables, about 54,167 LUT4 equivalents (65,000 logic cells as published by Lattice).

How many DSP blocks does the LFMXO5-65T have?

The LFMXO5-65T has 128 18×18 multipliers and 2.2 Mb of block RAM plus 1 Mb of LRAM.

Does the LFMXO5-65T have transceivers?

Yes, 1 SERDES transceivers.

What are the alternatives to the LFMXO5-65T?

Devices of similar size in other families include LFD2NX-65 (Lattice Certus-NX), T55 (Efinix Trion), XC7S50 (AMD Spartan-7).

Which software is used to design with the LFMXO5-65T?

Designs for the LFMXO5-65T are built with Lattice Radiant.

Other MachXO5-NX devices

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
LFMXO5-15D	11.7K 11.7K LUT4	14K LC	16	0.3 Mb	305	—	—
LFMXO5-20TD	16.7K 16.7K LUT4	20K LC	48	0.7 Mb	368	1 SERDES	Gen2
LFMXO5-25	22.5K 22.5K LUT4	27K LC	20	1.4 Mb	305	—	—
LFMXO5-30TD	25K 25K LUT4	30K LC	48	0.8 Mb	368	1 SERDES	Gen2
LFMXO5-35T	29.2K 29.2K LUT4	35K LC	48	1.9 Mb	371	1 SERDES	Gen2
LFMXO5-55TDQ	31.7K 31.7K LUT4	38K LC	93	0.3 Mb	297	2 SERDES	Gen2
LFMXO5-55T	44.2K 44.2K LUT4	53K LC	146	2.9 Mb	297	2 SERDES	Gen2
LFMXO5-55TD	44.2K 44.2K LUT4	53K LC	110	2.9 Mb	297	2 SERDES	Gen2
LFMXO5-65T	54.2K 54.2K LUT4	65K LC	128	2.2 Mb	371	1 SERDES	Gen2
LFMXO5-100T	80K 80K LUT4	96K LC	156	3.7 Mb	297	2 SERDES	Gen2

Source: Lattice MachXO5-NX product page, Family Table, retrieved 2026-10-24. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.