FPGA & adaptive SoC databook · online editionRev. 2026.10

LFMXO5-25

LatticeMachXO5-NX

The LFMXO5-25 is a MachXO5-NX FPGA from Lattice, built on a 28 nm process. It provides 22,500 LUT4 look-up tables (27,000 logic cells), 1.4 Mb of block RAM plus 0.5 Mb of LRAM and 20 18×18 multipliers. It offers up to 305 user I/O pins. It is available in 2 packages, from the BBG256 (14 × 14 mm) to the BBG400 (17 × 17 mm). Designs are built with Lattice Radiant.

22.5KLUT4-equivalent
22.5KLUTs (LUT4)
2018×18 multipliers
0.5 MbLRAM
1.4 MbBlock RAM
305Max. user I/O
—Transceivers

Specifications

VendorLattice
FamilyMachXO5-NX
SeriesNexus
Process28 nm
Configuration memoryInternal flash
LUT4-equivalent capacity22,500
Look-up tables (LUT4)22,500
   LUT noteDerived from logic cells ÷ 1.2 (Lattice definition for Nexus devices)
Logic cells27,000
Distributed RAM184 Kb
Block RAM1.4 Mb (80 × 18 Kb)
LRAM0.5 Mb
User flash memory14,848 Kb
DSP (18×18 multiplier)20
Max. user I/O305
TransceiversNone
PCI ExpressNone
Analog / monitorSAR ADC
Design toolLattice Radiant

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
BBG25614 × 140.8205—
BBG40017 × 170.8305—

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the LFMXO5-25

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
LFD2NX-25Lattice Certus-NX20.8K 20.8K LUT425K LC201.4 Mb311——
5CEA2Altera Cyclone V18.9K 9.4K ALMs25K LE251.7 Mb224——
GW3AR-20Gowin Arora III23K 23K LUT4—261.1 Mb238——
GW5A-25Gowin Arora V23K 23K LUT4—281 Mb239——
GW5AR-25Gowin Arora V23K 23K LUT4—281 Mb239——
LFE5U-25Lattice ECP524K 24K LUT4—281 Mb197——

Compare side by side: LFMXO5-25 vs LFD2NX-25, LFMXO5-25 vs 5CEA2, LFMXO5-25 vs GW3AR-20.

LFMXO5-25 quick facts

How many LUTs does the LFMXO5-25 have?

The LFMXO5-25 has 22,500 LUT4 look-up tables, about 22,500 LUT4 equivalents (27,000 logic cells as published by Lattice).

How many DSP blocks does the LFMXO5-25 have?

The LFMXO5-25 has 20 18×18 multipliers and 1.4 Mb of block RAM plus 0.5 Mb of LRAM.

Does the LFMXO5-25 have transceivers?

No, the LFMXO5-25 has no multi-gigabit transceivers. Its user I/O supports up to 305 pins.

What are the alternatives to the LFMXO5-25?

Devices of similar size in other families include LFD2NX-25 (Lattice Certus-NX), 5CEA2 (Altera Cyclone V), GW3AR-20 (Gowin Arora III).

Which software is used to design with the LFMXO5-25?

Designs for the LFMXO5-25 are built with Lattice Radiant.

Other MachXO5-NX devices

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
LFMXO5-15D11.7K 11.7K LUT414K LC160.3 Mb305——
LFMXO5-20TD16.7K 16.7K LUT420K LC480.7 Mb3681 SERDESGen2
LFMXO5-2522.5K 22.5K LUT427K LC201.4 Mb305——
LFMXO5-30TD25K 25K LUT430K LC480.8 Mb3681 SERDESGen2
LFMXO5-35T29.2K 29.2K LUT435K LC481.9 Mb3711 SERDESGen2
LFMXO5-55TDQ31.7K 31.7K LUT438K LC930.3 Mb2972 SERDESGen2
LFMXO5-55T44.2K 44.2K LUT453K LC1462.9 Mb2972 SERDESGen2
LFMXO5-55TD44.2K 44.2K LUT453K LC1102.9 Mb2972 SERDESGen2
LFMXO5-65T54.2K 54.2K LUT465K LC1282.2 Mb3711 SERDESGen2
LFMXO5-100T80K 80K LUT496K LC1563.7 Mb2972 SERDESGen2

Source: Lattice MachXO5-NX product page, Family Table, retrieved 2026-10-24. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.