XC7VH580T

AMDVirtex-7

The XC7VH580T is a Virtex-7 FPGA from AMD, built on a 28 nm process. It provides 362,800 LUT6 look-up tables (580,480 logic cells), 725,600 flip-flops, 33 Mb of block RAM and 1,680 DSP slices. It offers up to 600 user I/O pins and 56 GTH/GTZ transceivers at up to 28.05 Gb/s, with hard PCI Express Gen3 blocks. It is available in 2 packages, from the FLG1155 (35 × 35 mm) to the FLG1931 (45 × 45 mm). Temperature grades: commercial, extended. Designs are built with AMD Vivado.

580KLUT4-equivalent

363KLUTs (LUT6)

1,680DSP slices

33 MbBlock RAM

600Max. user I/O

56Transceivers (28.05 Gb/s)

Specifications

Vendor	AMD
Family	Virtex-7
Series	7 Series
Process	28 nm
Configuration memory	SRAM
LUT4-equivalent capacity	580,480
Look-up tables (LUT6)	362,800
Logic cells	580,480
Flip-flops	725,600
Distributed RAM	8,850 Kb
Block RAM	33 Mb (940 × 36 Kb)
DSP (DSP slice)	1,680
Clock management tiles	12

Max. user I/O	600
Differential pairs	288
GTH transceivers	48 × 13.1 Gb/s
GTZ transceivers	8 × 28.05 Gb/s
PCI Express	2× Gen3
Analog / monitor	XADC
Design tool	AMD Vivado

Packages

Package	Size (mm)	Pitch (mm)	User I/O	Transceivers
FLG1155	35 × 35	1.0	400	32
FLG1931	45 × 45	1.0	600	56

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature grade	Junction range	Speed grades
Commercial (C)	0 to 85 °C	-1, -2
Extended (E)	0 to 100 °C	-2L, -2G

Alternatives to the XC7VH580T

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
10AX066Altera Arria 10	501K 251K ALMs	865K LE	1,687	41.7 Mb	696	48 XCVR 17.4 Gb/s	Gen3
10AX057Altera Arria 10	434K 217K ALMs	747K LE	1,523	35.2 Mb	696	48 XCVR 17.4 Gb/s	Gen3
10AT090Altera Arria 10	679K 340K ALMs	1180K LE	1,518	47.3 Mb	624	78 XCVR/XCVR 25.78 Gb/s	Gen3
XC7K480TAMD Kintex-7	478K 299K LUT6	478K LC	1,920	33.6 Mb	400	32 GTX 12.5 Gb/s	Gen2
10AX090Altera Arria 10	679K 340K ALMs	1180K LE	1,518	47.3 Mb	768	96 XCVR 17.4 Gb/s	Gen3
XC7K420TAMD Kintex-7	417K 261K LUT6	417K LC	1,680	29.4 Mb	400	32 GTX 12.5 Gb/s	Gen2

Compare side by side: XC7VH580T vs 10AX066, XC7VH580T vs 10AX057, XC7VH580T vs 10AT090, XC7VH580T vs 10AX090.

XC7VH580T quick facts

How many LUTs does the XC7VH580T have?

The XC7VH580T has 362,800 LUT6 look-up tables, about 580,480 LUT4 equivalents (580,480 logic cells as published by AMD).

How many DSP blocks does the XC7VH580T have?

The XC7VH580T has 1,680 DSP slices and 33 Mb of block RAM.

Does the XC7VH580T have transceivers?

Yes, 56 GTH/GTZ transceivers at up to 28.05 Gb/s.

What are the alternatives to the XC7VH580T?

Devices of similar size in other families include 10AX066 (Altera Arria 10), 10AX057 (Altera Arria 10), 10AT090 (Altera Arria 10).

Which software is used to design with the XC7VH580T?

Designs for the XC7VH580T are built with AMD Vivado.

Other Virtex-7 devices

Device	LUT4-eq.	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe
XC7VX330T	326K 204K LUT6	326K LC	1,120	26.4 Mb	700	28 GTH 13.1 Gb/s	Gen3
XC7VX415T	412K 258K LUT6	412K LC	2,160	30.9 Mb	600	48 GTH 13.1 Gb/s	Gen3
XC7VX485T	486K 304K LUT6	486K LC	2,800	36.2 Mb	700	56 GTX 12.5 Gb/s	Gen2
XC7VX550T	554K 346K LUT6	554K LC	2,880	41.5 Mb	600	80 GTH 13.1 Gb/s	Gen3
XC7VH580T	580K 363K LUT6	580K LC	1,680	33 Mb	600	56 GTH/GTZ 28.05 Gb/s	Gen3
XC7V585T	583K 364K LUT6	583K LC	1,260	27.9 Mb	850	36 GTX 12.5 Gb/s	Gen2
XC7VX690T	693K 433K LUT6	693K LC	3,600	51.7 Mb	1,000	80 GTH 13.1 Gb/s	Gen3
XC7VH870T	876K 548K LUT6	876K LC	2,520	49.6 Mb	300	88 GTH/GTZ 28.05 Gb/s	Gen3
XC7VX980T	979K 612K LUT6	979K LC	3,600	52.7 Mb	900	72 GTH 13.1 Gb/s	Gen3
XC7VX1140T	1139K 712K LUT6	1139K LC	3,360	66.1 Mb	1,100	96 GTH 13.1 Gb/s	Gen3
XC7V2000T	1955K 1222K LUT6	1955K LC	2,160	45.4 Mb	1,200	36 GTX 12.5 Gb/s	Gen2

Source: AMD 7 Series FPGAs Product Selection Guide, XMP101 (v1.8). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.