FPGA & adaptive SoC databook · online editionRev. 2026.10

XC7VX1140T

AMDVirtex-7

The XC7VX1140T is a Virtex-7 FPGA from AMD, built on a 28 nm process. It provides 712,000 LUT6 look-up tables (1,139,200 logic cells), 1,424,000 flip-flops, 66.1 Mb of block RAM and 3,360 DSP slices. It offers up to 1,100 user I/O pins and 96 GTH transceivers at up to 13.1 Gb/s, with hard PCI Express Gen3 blocks. It is available in 3 packages, from the FLG1926 (45 × 45 mm) to the FLG1930 (45 × 45 mm). Temperature grades: commercial, extended, industrial. Designs are built with AMD Vivado.

1139KLUT4-equivalent
712KLUTs (LUT6)
3,360DSP slices
66.1 MbBlock RAM
1,100Max. user I/O
96Transceivers (13.1 Gb/s)

Specifications

VendorAMD
FamilyVirtex-7
Series7 Series
Process28 nm
Configuration memorySRAM
LUT4-equivalent capacity1,139,200
Look-up tables (LUT6)712,000
Logic cells1,139,200
Flip-flops1,424,000
Distributed RAM17,700 Kb
Block RAM66.1 Mb (1880 × 36 Kb)
DSP (DSP slice)3,360
Clock management tiles24
Max. user I/O1,100
Differential pairs528
GTH transceivers96 × 13.1 Gb/s
PCI Express4× Gen3
Analog / monitorXADC
Design toolAMD Vivado

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
FLG192645 × 451.072064
FLG192845 × 451.048096
FLG193045 × 451.01,10024

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature gradeJunction rangeSpeed grades
Commercial (C)0 to 85 °C-1, -2
Extended (E)0 to 100 °C-2L, -2G
Industrial (I)−40 to 100 °C-1

Alternatives to the XC7VX1140T

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
GX 1650Altera Stratix 10 GX/SX1101K 551K ALMs1624K LE3,145114 Mb70496 XCVR/XCVR 28.3 Gb/sGen3
XCKU15PAMD Kintex UltraScale+837K 523K LUT61143K SLC1,96834.6 Mb66876 GTH/GTY 32.75 Gb/sGen3
GX 2100Altera Stratix 10 GX/SX1359K 680K ALMs2005K LE3,744127 Mb70496 XCVR/XCVR 28.3 Gb/sGen3
GX 1100Altera Stratix 10 GX/SX899K 449K ALMs1325K LE2,592107 Mb68848 XCVR/XCVR 28.3 Gb/sGen3
10AX115Altera Arria 10854K 427K ALMs1506K LE1,51853 Mb76896 XCVR 17.4 Gb/sGen3
10AT115Altera Arria 10854K 427K ALMs1506K LE1,51853 Mb62478 XCVR/XCVR 25.78 Gb/sGen3

Compare side by side: XC7VX1140T vs GX 1650, XC7VX1140T vs XCKU15P, XC7VX1140T vs GX 2100.

XC7VX1140T quick facts

How many LUTs does the XC7VX1140T have?

The XC7VX1140T has 712,000 LUT6 look-up tables, about 1,139,200 LUT4 equivalents (1,139,200 logic cells as published by AMD).

How many DSP blocks does the XC7VX1140T have?

The XC7VX1140T has 3,360 DSP slices and 66.1 Mb of block RAM.

Does the XC7VX1140T have transceivers?

Yes, 96 GTH transceivers at up to 13.1 Gb/s.

What are the alternatives to the XC7VX1140T?

Devices of similar size in other families include GX 1650 (Altera Stratix 10 GX/SX), XCKU15P (AMD Kintex UltraScale+), GX 2100 (Altera Stratix 10 GX/SX).

Which software is used to design with the XC7VX1140T?

Designs for the XC7VX1140T are built with AMD Vivado.

Other Virtex-7 devices

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
XC7VX330T326K 204K LUT6326K LC1,12026.4 Mb70028 GTH 13.1 Gb/sGen3
XC7VX415T412K 258K LUT6412K LC2,16030.9 Mb60048 GTH 13.1 Gb/sGen3
XC7VX485T486K 304K LUT6486K LC2,80036.2 Mb70056 GTX 12.5 Gb/sGen2
XC7VX550T554K 346K LUT6554K LC2,88041.5 Mb60080 GTH 13.1 Gb/sGen3
XC7VH580T580K 363K LUT6580K LC1,68033 Mb60056 GTH/GTZ 28.05 Gb/sGen3
XC7V585T583K 364K LUT6583K LC1,26027.9 Mb85036 GTX 12.5 Gb/sGen2
XC7VX690T693K 433K LUT6693K LC3,60051.7 Mb1,00080 GTH 13.1 Gb/sGen3
XC7VH870T876K 548K LUT6876K LC2,52049.6 Mb30088 GTH/GTZ 28.05 Gb/sGen3
XC7VX980T979K 612K LUT6979K LC3,60052.7 Mb90072 GTH 13.1 Gb/sGen3
XC7VX1140T1139K 712K LUT61139K LC3,36066.1 Mb1,10096 GTH 13.1 Gb/sGen3
XC7V2000T1955K 1222K LUT61955K LC2,16045.4 Mb1,20036 GTX 12.5 Gb/sGen2

Source: AMD 7 Series FPGAs Product Selection Guide, XMP101 (v1.8). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.