GW5AT-60
GowinArora VThe GW5AT-60 is an Arora V FPGA from Gowin, built on a 22 nm process. It provides 59,904 LUT4 look-up tables, 59,904 flip-flops, 2.1 Mb of block RAM and 118 27×18 DSP blocks. It offers up to 320 user I/O pins and 4 SERDES transceivers at up to 12.5 Gb/s, with hard PCI Express Gen3 x4 blocks. It is available in 7 packages, from the CS234 (5.4 × 7.4 mm) to the PG484A (23 × 23 mm). Designs are built with Gowin EDA.
Specifications
| Vendor | Gowin |
|---|---|
| Family | Arora V |
| Series | GW5A |
| Process | 22 nm |
| Configuration memory | SRAM |
| LUT4-equivalent capacity | 59,904 |
| Look-up tables (LUT4) | 59,904 |
| Flip-flops | 59,904 |
| Distributed RAM | 468 Kb |
| Block RAM | 2.1 Mb (118 × 18 Kb) |
| DSP (27×18 DSP block) | 118 |
| Max. user I/O | 320 |
|---|---|
| SERDES transceivers | 4 × 12.5 Gb/s |
| PCI Express | Gen3 x4 |
| Analog / monitor | ADC |
| Design tool | Gowin EDA |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| PG484A | 23 × 23 | 1.0 | 297 | 4 |
| CS234 | 5.4 × 7.4 | 0.4 | 132 | 4 |
| UG225 | 13 × 13 | 0.8 | 113 | 4 |
| UG225H | 13 × 13 | 0.8 | 113 | 4 |
| UG324 | 15 × 15 | 0.8 | 160 | 4 |
| UG324A | 15 × 15 | 0.8 | 162 | 4 |
| UG324S | 15 × 15 | 0.8 | 198 | 4 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Alternatives to the GW5AT-60
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| XC7A50TAMD Artix-7 | 52.2K 32.6K LUT6 | 52.2K LC | 120 | 2.6 Mb | 250 | 4 GTP 6.6 Gb/s | Gen2 |
| EP4CGX50Altera Cyclone IV | 50K 50K LUT4 | 50K LE | 140 | 2.4 Mb | 310 | 8 XCVR 3.125 Gb/s | Gen2 |
| XCSU60PAMD Spartan UltraScale+ | 48K 30K LUT6 | 66K SLC | 144 | 3.4 Mb | 262 | 4 GTH 16.3 Gb/s | Gen4 |
| XCSU45PAMD Spartan UltraScale+ | 38.4K 24K LUT6 | 53K SLC | 96 | 2.5 Mb | 262 | 4 GTH 16.3 Gb/s | Gen4 |
| MPF050TMicrochip PolarFire | 48K 48K LUT4 | 48K LE | 150 | 3.1 Mb | 188 | 4 SERDES 12.7 Gb/s | Gen2 |
| LFCPNX-50Lattice CertusPro-NX | 43.3K 43.3K LUT4 | 52K LC | 96 | 1.7 Mb | 269 | 4 SERDES 10.3125 Gb/s | Gen3 |
Compare side by side: GW5AT-60 vs XC7A50T, GW5AT-60 vs EP4CGX50, GW5AT-60 vs XCSU60P.
GW5AT-60 quick facts
How many LUTs does the GW5AT-60 have?
The GW5AT-60 has 59,904 LUT4 look-up tables, about 59,904 LUT4 equivalents.
How many DSP blocks does the GW5AT-60 have?
The GW5AT-60 has 118 27×18 DSP blocks and 2.1 Mb of block RAM.
Does the GW5AT-60 have transceivers?
Yes, 4 SERDES transceivers at up to 12.5 Gb/s.
What are the alternatives to the GW5AT-60?
Devices of similar size in other families include XC7A50T (AMD Artix-7), EP4CGX50 (Altera Cyclone IV), XCSU60P (AMD Spartan UltraScale+).
Which software is used to design with the GW5AT-60?
Designs for the GW5AT-60 are built with Gowin EDA.
Other Arora V devices
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| GW5AT-15 | 15.1K 15.1K LUT4 | — | 28 | 0.6 Mb | 53 | 4 SERDES 12.5 Gb/s | Gen3 |
| GW5ART-15 | 15.1K 15.1K LUT4 | — | 28 | 0.6 Mb | 53 | 4 SERDES 12.5 Gb/s | Gen3 |
| GW5A-25 | 23K 23K LUT4 | — | 28 | 1 Mb | 239 | — | — |
| GW5AR-25 | 23K 23K LUT4 | — | 28 | 1 Mb | 239 | — | — |
| GW5AS-25 | 23K 23K LUT4 | — | 28 | 1 Mb | 239 | — | — |
| GW5A-60 | 59.9K 59.9K LUT4 | — | 118 | 2.1 Mb | 320 | — | — |
| GW5AT-60 | 59.9K 59.9K LUT4 | — | 118 | 2.1 Mb | 320 | 4 SERDES 12.5 Gb/s | Gen3 |
| GW5AT-75 | 86.7K 86.7K LUT4 | — | 213 | 4.5 Mb | 312 | 8 SERDES 12.5 Gb/s | Gen3 |
| GW5A-138 | 138K 138K LUT4 | — | 298 | 6 Mb | 312 | — | — |
| GW5AT-138 | 138K 138K LUT4 | — | 298 | 6 Mb | 312 | 8 SERDES 12.5 Gb/s | Gen3 |
| GW5AS-138 | 138K 138K LUT4 | — | 298 | 6 Mb | 312 | — | — |
| GW5AST-138 | 138K 138K LUT4 | — | 298 | 6 Mb | 376 | 8 SERDES 12.5 Gb/s | Gen3 |
Source: Gowin Arora V product page, retrieved 2026-10-24. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.