FPGA & adaptive SoC databook · online editionRev. 2026.10

GW5AS-138

GowinArora V

The GW5AS-138 is an Arora V SoC FPGA from Gowin, built on a 22 nm process. It provides 138,240 LUT4 look-up tables, 138,240 flip-flops, 6 Mb of block RAM and 298 27×18 DSP blocks. Its processing system includes a single RISC-V AE350 core. The programmable logic offers up to 312 user I/O pins. It comes in a single package, the UG324A (15 × 15 mm). Designs are built with Gowin EDA.

138KLUT4-equivalent
138KLUTs (LUT4)
29827×18 DSP blocks
6 MbBlock RAM
312Max. user I/O
—Transceivers
1× RISC-V AE350Hard processor

Specifications

VendorGowin
FamilyArora V
SeriesGW5A
Process22 nm
Configuration memorySRAM
LUT4-equivalent capacity138,240
Look-up tables (LUT4)138,240
Flip-flops138,240
Distributed RAM1,080 Kb
Block RAM6 Mb (340 × 18 Kb)
DSP (27×18 DSP block)298
Max. user I/O312
PL transceiversNone
PCI Express (PL)None
Analog / monitorADC
Hard processor1× RISC-V AE350
Design toolGowin EDA

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
UG324A15 × 150.8222—

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the GW5AS-138

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
XCZU3CGAMD Zynq UltraScale+ MPSoC114K 71K LUT6154K SLC3607.6 Mb252——
XCZU3EGAMD Zynq UltraScale+ MPSoC114K 71K LUT6154K SLC3607.6 Mb252——
XC7Z020AMD Zynq 700085.1K 53.2K LUT685K LC2204.9 Mb200——
XCZU2CGAMD Zynq UltraScale+ MPSoC75.2K 47K LUT6103K SLC2405.3 Mb252——
XCZU2EGAMD Zynq UltraScale+ MPSoC75.2K 47K LUT6103K SLC2405.3 Mb252——
XCZU1CGAMD Zynq UltraScale+ MPSoC59.2K 37K LUT681K SLC2163.8 Mb180——

Compare side by side: GW5AS-138 vs XCZU3CG, GW5AS-138 vs XCZU3EG, GW5AS-138 vs XC7Z020, GW5AS-138 vs XCZU2CG, GW5AS-138 vs XCZU2EG.

GW5AS-138 quick facts

How many LUTs does the GW5AS-138 have?

The GW5AS-138 has 138,240 LUT4 look-up tables, about 138,240 LUT4 equivalents.

How many DSP blocks does the GW5AS-138 have?

The GW5AS-138 has 298 27×18 DSP blocks and 6 Mb of block RAM.

Does the GW5AS-138 have transceivers?

No, the GW5AS-138 has no multi-gigabit transceivers. Its user I/O supports up to 312 pins.

Does the GW5AS-138 have a processor?

Yes. It includes a hard 1× RISC-V AE350 processor.

What are the alternatives to the GW5AS-138?

Devices of similar size in other families include XCZU3CG (AMD Zynq UltraScale+ MPSoC), XCZU3EG (AMD Zynq UltraScale+ MPSoC), XC7Z020 (AMD Zynq 7000).

Which software is used to design with the GW5AS-138?

Designs for the GW5AS-138 are built with Gowin EDA.

Other Arora V devices

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
GW5AT-1515.1K 15.1K LUT4—280.6 Mb534 SERDES 12.5 Gb/sGen3
GW5ART-1515.1K 15.1K LUT4—280.6 Mb534 SERDES 12.5 Gb/sGen3
GW5A-2523K 23K LUT4—281 Mb239——
GW5AR-2523K 23K LUT4—281 Mb239——
GW5AS-2523K 23K LUT4—281 Mb239——
GW5A-6059.9K 59.9K LUT4—1182.1 Mb320——
GW5AT-6059.9K 59.9K LUT4—1182.1 Mb3204 SERDES 12.5 Gb/sGen3
GW5AT-7586.7K 86.7K LUT4—2134.5 Mb3128 SERDES 12.5 Gb/sGen3
GW5A-138138K 138K LUT4—2986 Mb312——
GW5AT-138138K 138K LUT4—2986 Mb3128 SERDES 12.5 Gb/sGen3
GW5AS-138138K 138K LUT4—2986 Mb312——
GW5AST-138138K 138K LUT4—2986 Mb3768 SERDES 12.5 Gb/sGen3

Source: Gowin Arora V product page, retrieved 2026-10-24. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.