LIF-MD6000
LatticeCrossLinkThe LIF-MD6000 is a CrossLink FPGA from Lattice, built on a 40 nm process. It provides 5,936 LUT4 look-up tables, 5,936 flip-flops, 0.2 Mb of block RAM, with no hard multipliers. It offers up to 37 user I/O pins. It is available in 5 packages, from the WLCSP36 (2.5 × 2.5 mm) to the ckfBGA80 (7 × 7 mm). Temperature grades: industrial, automotive. Designs are built with Lattice Diamond.
Specifications
| Vendor | Lattice |
|---|---|
| Family | CrossLink |
| Series | CrossLink |
| Process | 40 nm |
| Configuration memory | NVCM (one-time programmable) |
| Look-up tables (LUT4) | 5,936 |
| Logic block | 4-input look-up table |
| Flip-flops | 5,936 |
| Distributed RAM | 47 Kb |
| Block RAM | 0.2 Mb (20 × 9 Kb) |
| DSP (18×18 multiplier) | None |
| Clock management tiles | 1 |
| Max. user I/O | 37 |
|---|---|
| Transceivers | None |
| PCI Express | None |
| Analog / monitor | None |
| Design tool | Lattice Diamond |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| WLCSP36 | 2.5 × 2.5 | 0.4 | 17 | — |
| ucfBGA64 | 3.5 × 3.5 | 0.4 | 29 | — |
| csfBGA81 | 4.5 × 4.5 | 0.5 | 37 | — |
| ctfBGA80 | 6.5 × 6.5 | 0.65 | 37 | — |
| ckfBGA80 | 7 × 7 | 0.65 | 37 | — |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Industrial (I) | −40 to 100 °C | -6 |
| Automotive (A) | — | -6 |
Alternatives to the LIF-MD6000
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| LIF-MDF6000Lattice CrossLinkPlus | 5,936 LUT4 | — | — | 0.2 Mb | 37 | — | — | — |
| iCE40LM4KLattice iCE40 LP/HX/LM | 3,520 LUT4 | 3.5K LC | — | 0.1 Mb | 39 | — | — | — |
| GW3AT-6Gowin Arora III | 6,912 LUT4 | — | — | 0.3 Mb | 70 | 1 SERDES 8.5 Gb/s | — | — |
| SLG47920Renesas ForgeFPGA | 2,240 LUT5 | — | — | 0.1 Mb | 32 | — | — | — |
| iCE40HX4KLattice iCE40 LP/HX/LM | 3,520 LUT4 | 3.5K LC | — | 0.1 Mb | 109 | — | — | — |
| iCE40LP8KLattice iCE40 LP/HX/LM | 7,680 LUT4 | 7.7K LC | — | 0.1 Mb | 180 | — | — | 11 tinyfpga_bx |
Compare side by side: LIF-MD6000 vs LIF-MDF6000, LIF-MD6000 vs iCE40LM4K, LIF-MD6000 vs GW3AT-6, LIF-MD6000 vs SLG47920.
Compare the LIF-MD6000 with up to three other FPGAs.
LIF-MD6000 quick facts
How many LUTs does the LIF-MD6000 have?
The LIF-MD6000 has 5,936 LUT4 look-up tables. Logic block: 4-input look-up table.
How many DSP blocks does the LIF-MD6000 have?
The LIF-MD6000 has no 18×18 multipliers and 0.2 Mb of block RAM.
Does the LIF-MD6000 have transceivers?
No, the LIF-MD6000 has no multi-gigabit transceivers. Its user I/O supports up to 37 pins.
What are the alternatives to the LIF-MD6000?
Devices of similar size in other families include LIF-MDF6000 (Lattice CrossLinkPlus), iCE40LM4K (Lattice iCE40 LP/HX/LM), GW3AT-6 (Gowin Arora III).
Which software is used to design with the LIF-MD6000?
Designs for the LIF-MD6000 are built with Lattice Diamond.
Other CrossLink devices
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| LIF-MD6000 | 5,936 LUT4 | — | — | 0.2 Mb | 37 | — | — | — |
Source: Lattice CrossLink product page and Family Data Sheet, FPGA-DS-02007. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.