XCAU20P
AMDArtix UltraScale+The XCAU20P is an Artix UltraScale+ FPGA from AMD, built on a 16 nm process. It provides 109,000 LUT6 look-up tables (238,000 system logic cells), about 174,400 LUT4 equivalents, 218,000 flip-flops, 7 Mb of block RAM and 900 DSP slices. It offers up to 228 user I/O pins and 12 GTY transceivers at up to 32.75 Gb/s, with hard PCI Express Gen3 x8 blocks. It is available in 2 packages, from the SFVB784 (23 × 23 mm) to the FFVB676 (27 × 27 mm). Temperature grades: extended, industrial. Designs are built with AMD Vivado.
Specifications
| Vendor | AMD |
|---|---|
| Family | Artix UltraScale+ |
| Series | UltraScale+ |
| Process | 16 nm |
| Configuration memory | SRAM |
| LUT4-equivalent capacity | 174,400 |
| Look-up tables (LUT6) | 109,000 |
| System logic cells | 238,000 |
| Flip-flops | 218,000 |
| Distributed RAM | 3,277 Kb |
| Block RAM | 7 Mb (200 × 36 Kb) |
| DSP (DSP slice) | 900 |
| Clock management tiles | 4 |
| Max. user I/O | 228 |
|---|---|
| HD I/O | 72 |
| HP I/O | 156 |
| GTY transceivers | 12 × 32.75 Gb/s |
| PCI Express | Gen3 x8 |
| Analog / monitor | System Monitor |
| Design tool | AMD Vivado |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| SFVB784 | 23 × 23 | 0.8 | 228 | 12 |
| FFVB676 | 27 × 27 | 1.0 | 228 | 12 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Extended (E) | 0 to 100 °C | -1, -2 |
| Industrial (I) | −40 to 100 °C | -1, -2, -1L |
Alternatives to the XCAU20P
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| LAV-AT-G30Lattice Avant-G | 163K 163K LUT4 | 262K LC | 700 | 14.4 Mb | 298 | 12 SERDES 12.5 Gb/s | — |
| LAV-AT-X30Lattice Avant-X | 163K 163K LUT4 | 262K LC | 700 | 14.4 Mb | 298 | 12 SERDES 25 Gb/s | — |
| XC7K160TAMD Kintex-7 | 162K 101K LUT6 | 162K LC | 600 | 11.4 Mb | 400 | 8 GTX 12.5 Gb/s | Gen2 |
| MPF200TMicrochip PolarFire | 192K 192K LUT4 | 192K LE | 588 | 12 Mb | 368 | 16 SERDES 12.7 Gb/s | Gen2 |
| XC7A200TAMD Artix-7 | 215K 135K LUT6 | 215K LC | 740 | 12.8 Mb | 500 | 16 GTP 6.6 Gb/s | Gen2 |
| Certus-N2 CT20Lattice Certus-N2 | 135K 135K LUT4 | 220K LC | 520 | 12 Mb | 298 | 8 SERDES 16 Gb/s | — |
Compare side by side: XCAU20P vs LAV-AT-G30, XCAU20P vs LAV-AT-X30, XCAU20P vs XC7K160T.
XCAU20P quick facts
How many LUTs does the XCAU20P have?
The XCAU20P has 109,000 LUT6 look-up tables, about 174,400 LUT4 equivalents (238,000 system logic cells as published by AMD).
How many DSP blocks does the XCAU20P have?
The XCAU20P has 900 DSP slices and 7 Mb of block RAM.
Does the XCAU20P have transceivers?
Yes, 12 GTY transceivers at up to 32.75 Gb/s.
What are the alternatives to the XCAU20P?
Devices of similar size in other families include LAV-AT-G30 (Lattice Avant-G), LAV-AT-X30 (Lattice Avant-X), XC7K160T (AMD Kintex-7).
Which software is used to design with the XCAU20P?
Designs for the XCAU20P are built with AMD Vivado.
Other Artix UltraScale+ devices
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| XCAU7P | 59.2K 37K LUT6 | 82K SLC | 216 | 3.8 Mb | 248 | 4 GTH 16.3 Gb/s | Gen3 |
| XCAU10P | 70.4K 44K LUT6 | 96K SLC | 400 | 3.5 Mb | 228 | 12 GTH 16.3 Gb/s | Gen4 |
| XCAU15P | 125K 78K LUT6 | 170K SLC | 576 | 5.1 Mb | 228 | 12 GTH 16.3 Gb/s | Gen4 |
| XCAU20P | 174K 109K LUT6 | 238K SLC | 900 | 7 Mb | 228 | 12 GTY 32.75 Gb/s | Gen3 |
| XCAU25P | 226K 141K LUT6 | 308K SLC | 1,200 | 10.5 Mb | 304 | 12 GTY 32.75 Gb/s | Gen3 |
Source: AMD UltraScale+ FPGAs Product Selection Guide, XMP103 (v2.8). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.