GX 1100

The GX 1100 is a Stratix 10 GX/SX FPGA from Altera, built on a 14 nm process. It provides 449,280 adaptive logic modules (ALMs) (1,325,000 logic elements (LEs)), about 898,560 LUT4 equivalents, 107 Mb of block RAM and 2,592 variable-precision DSP blocks. It offers up to 688 user I/O pins and 48 XCVR/XCVR transceivers at up to 28.3 Gb/s, with hard PCI Express Gen3 x16 blocks. It comes in a single package, the F1760 (42.5 × 42.5 mm). Designs are built with Altera Quartus Prime.

Specifications

Packages

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the GX 1100

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Compare side by side: GX 1100 vs XCVU3P, GX 1100 vs XCKU15P, GX 1100 vs XCVU5P, GX 1100 vs XCVU31P, GX 1100 vs XCVU33P.

GX 1100 quick facts

How many LUTs does the GX 1100 have?

The GX 1100 has 449,280 adaptive logic modules (ALMs), about 898,560 LUT4 equivalents (1,325,000 logic elements (les) as published by Altera).

How many DSP blocks does the GX 1100 have?

The GX 1100 has 2,592 variable-precision DSP blocks and 107 Mb of block RAM.

Does the GX 1100 have transceivers?

Yes, 48 XCVR/XCVR transceivers at up to 28.3 Gb/s.

What are the alternatives to the GX 1100?

Devices of similar size in other families include XCVU3P (AMD Virtex UltraScale+), XCKU15P (AMD Kintex UltraScale+), XCVU5P (AMD Virtex UltraScale+).

Which software is used to design with the GX 1100?

Designs for the GX 1100 are built with Altera Quartus Prime.

Other Stratix 10 GX/SX devices

Source: Altera Stratix 10 GX/SX FPGA Product Table, 2025.09.23. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.