XCVR1902

AMDVersal RFSoC

The XCVR1902 is a Versal RF SoC FPGA from AMD. It provides 1,130,880 LUT6 look-up tables (2,473,800 system logic cells), 2,261,760 flip-flops, 80 Mb of block RAM plus 74 Mb of UltraRAM and 3,976 DSP Engines. Its processing system includes two Arm Cortex-A72 cores, a dual Arm Cortex-R5F real-time processor. The programmable logic offers up to 470 user I/O pins and 20 GTM2 transceivers at up to 112 Gb/s, with hard PCI Express Gen5 x4 blocks. It comes in a single package, the VSVA2488 ( mm). Designs are built with AMD Vivado.

1,130,880LUTs (LUT6)

3,976DSP Engines

80 MbBlock RAM

74 MbUltraRAM

470Max. user I/O

20Transceivers (112 Gb/s)

2× A72Hard processor

Specifications

Vendor	AMD
Family	Versal RF
Series	Versal
Configuration memory	SRAM
Look-up tables (LUT6)	1,130,880
Logic block	6-input look-up table, fracturable into two LUT5 with shared inputs
LUT4 equivalent (approx.)	≈1,809,408
System logic cells	2,473,800
Flip-flops	2,261,760
Distributed RAM	35,840 Kb
Block RAM	80 Mb
UltraRAM	74 Mb
AI Engines	120 AI Engine tiles
DSP (DSP Engine)	3,976

Max. user I/O	470
GTM2 transceivers	20 × 112 Gb/s
PCI Express (PL)	Gen5 x4
Analog / monitor	16× 14-bit RF-ADC (8 GSPS), 16× 14-bit RF-DAC (16 GSPS)
Hard processor	2× Arm Cortex-A72
Real-time processor	Dual Arm Cortex-R5F
Design tool	AMD Vivado

Packages

Package	Size (mm)	Pitch (mm)	User I/O	PS I/O	Transceivers
VSVA2488		0.92	470	78	20

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the XCVR1902

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
XC2VP3202AMD Versal Premium Gen 2	797,056 LUT6	1744K SLC	4,004	53 Mb	438	32 GTM2 112 Gb/s	Gen6	—
Ti2000Efinix Titanium	— 1974K LEs, LUTs not published	1974K LE	3,808	117 Mb	480	40 SERDES 25.8 Gb/s	Gen4	—
XCVM2502AMD Versal Prime	900,224 LUT6	1969K SLC	3,984	47 Mb	648	16 GTYP 32.75 Gb/s	Gen5	—
1SA28Altera Stratix 10 AX	933,120 ALMs	2753K LE	5,760	229 Mb	440	36 XCVR 28.9 Gb/s	Gen3	—
AGRW014Altera Agilex 9 Direct RF	487,200 ALMs	1437K LE	4,510	139 Mb	434	16 XCVR 58 Gb/s	Gen4	—
XC2VP3102AMD Versal Premium Gen 2	643,456 LUT6	1408K SLC	3,332	44 Mb	438	32 GTM2 112 Gb/s	Gen6	—

Compare side by side: XCVR1902 vs XC2VP3202, XCVR1902 vs Ti2000, XCVR1902 vs XCVM2502.

Compare the XCVR1902 with up to three other FPGAs.

XCVR1902 quick facts

How many LUTs does the XCVR1902 have?

The XCVR1902 has 1,130,880 LUT6 look-up tables (2,473,800 system logic cells as published by AMD). Logic block: 6-input look-up table, fracturable into two LUT5 with shared inputs.

How many DSP blocks does the XCVR1902 have?

The XCVR1902 has 3,976 DSP Engines and 80 Mb of block RAM plus 74 Mb of UltraRAM.

Does the XCVR1902 have transceivers?

Yes, 20 GTM2 transceivers at up to 112 Gb/s.

Does the XCVR1902 have a processor?

Yes. It includes a hard 2× Arm Cortex-A72 processor.

What are the alternatives to the XCVR1902?

Devices of similar size in other families include XC2VP3202 (AMD Versal Premium Gen 2), Ti2000 (Efinix Titanium), XCVM2502 (AMD Versal Prime).

Which software is used to design with the XCVR1902?

Designs for the XCVR1902 are built with AMD Vivado.

Other Versal RF devices

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
XCVR1602	551,040 LUT6	1205K SLC	2,256	39 Mb	470	20 GTYP/GTM 58 Gb/s	Gen5	—
XCVR1652	551,040 LUT6	1205K SLC	2,256	39 Mb	470	20 GTYP/GTM 58 Gb/s	Gen5	—
XCVR1902	1,130,880 LUT6	2474K SLC	3,976	80 Mb	470	20 GTM2 112 Gb/s	Gen5	—
XCVR1952	1,130,880 LUT6	2474K SLC	3,976	80 Mb	470	20 GTM2 112 Gb/s	Gen5	—

Source: AMD Versal RF Series Product Selection Guide, XMP508 (v1.5). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.