AGRW014

AlteraAgilex 9 Direct RF

The AGRW014 is an Agilex 9 Direct RF SoC FPGA from Altera, built on the Intel 7 process. It provides 487,200 adaptive logic modules (ALMs) (1,437,240 logic elements (LEs)), 1,948,800 flip-flops, 139 Mb of block RAM and 4,510 variable-precision DSP blocks. Its processing system includes four Arm Cortex-A53 cores running at up to 1.41 GHz. The programmable logic offers up to 434 user I/O pins and 16 XCVR transceivers at up to 58 Gb/s, with hard PCI Express Gen4 x16 blocks. It comes in a single package, the 1774B (32 × 45 mm). Designs are built with Altera Quartus Prime.

487,200ALMs

4,510variable-precision DSP blocks

139 MbBlock RAM

434Max. user I/O

16Transceivers (58 Gb/s)

4× A53Hard processor

Specifications

Vendor	Altera
Family	Agilex 9 Direct RF
Series	Agilex
Process	Intel 7
Configuration memory	SRAM
Adaptive logic modules (ALMs)	487,200
Logic block	adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions)
LUT note	Adaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions
LUT4 equivalent (approx.)	≈974,400
Logic elements (LEs)	1,437,240
Flip-flops	1,948,800
Distributed RAM	15,360 Kb
Block RAM	139 Mb (7110 × 20 Kb)
DSP (variable-precision DSP block)	4,510

Max. user I/O	434
Differential pairs	217
XCVR transceivers	16 × 58 Gb/s
PCI Express (PL)	Gen4 x16
Analog / monitor	4× 10-bit RF-ADC (64 GSPS), 4× 10-bit RF-DAC (64 GSPS)
Hard processor	4× Arm Cortex-A53 @ 1.41 GHz
Design tool	Altera Quartus Prime

Packages

Package	Size (mm)	Pitch (mm)	User I/O	PS I/O	Transceivers
1774B	32 × 45	0.92	434	48	16

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the AGRW014

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
XC2VP3202AMD Versal Premium Gen 2	797,056 LUT6	1744K SLC	4,004	53 Mb	438	32 GTM2 112 Gb/s	Gen6	—
XC2VP3102AMD Versal Premium Gen 2	643,456 LUT6	1408K SLC	3,332	44 Mb	438	32 GTM2 112 Gb/s	Gen6	—
AGF 014Altera Agilex 7 F-Series	487,200 ALMs	1437K LE	4,510	139 Mb	768	32 XCVR 58 Gb/s	—	2,970 intel_dk-dev-agf014ea
A5D 110Altera Agilex 5 D-Series	364,000 ALMs	1074K LE	3,312	104.3 Mb	616	24 XCVR 28 Gb/s	Gen4	—
AGF 012Altera Agilex 7 F-Series	399,500 ALMs	1179K LE	3,743	115 Mb	768	32 XCVR 58 Gb/s	—	—
XCVR1902AMD Versal RF	1,130,880 LUT6	2474K SLC	3,976	80 Mb	470	20 GTM2 112 Gb/s	Gen5	—

Compare side by side: AGRW014 vs XC2VP3202, AGRW014 vs XC2VP3102, AGRW014 vs AGF 014.

Compare the AGRW014 with up to three other FPGAs.

AGRW014 quick facts

How many LUTs does the AGRW014 have?

The AGRW014 has 487,200 adaptive logic modules (ALMs) (1,437,240 logic elements (les) as published by Altera). Logic block: adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions).

How many DSP blocks does the AGRW014 have?

The AGRW014 has 4,510 variable-precision DSP blocks and 139 Mb of block RAM.

Does the AGRW014 have transceivers?

Yes, 16 XCVR transceivers at up to 58 Gb/s.

Does the AGRW014 have a processor?

Yes. It includes a hard 4× Arm Cortex-A53 processor.

What are the alternatives to the AGRW014?

Devices of similar size in other families include XC2VP3202 (AMD Versal Premium Gen 2), XC2VP3102 (AMD Versal Premium Gen 2), AGF 014 (Altera Agilex 7 F-Series).

Which software is used to design with the AGRW014?

Designs for the AGRW014 are built with Altera Quartus Prime.

Other Agilex 9 Direct RF devices

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
AGRW014	487,200 ALMs	1437K LE	4,510	139 Mb	434	16 XCVR 58 Gb/s	Gen4	—
AGRW027	912,800 ALMs	2693K LE	8,528	259 Mb	558	32 XCVR 58 Gb/s	Gen4	—
AGRM027	912,800 ALMs	2693K LE	8,528	259 Mb	660	32 XCVR 58 Gb/s	Gen4	—
AGRW039	1,305,600 ALMs	3852K LE	12,300	370 Mb	768	32 XCVR 58 Gb/s	Gen4	—

Source: Altera Direct RF-Series FPGAs and SoCs Product Table, 2026.05.29. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.