5SGXA7
AlteraStratix VThe 5SGXA7 is a Stratix V FPGA from Altera, built on a 28 nm process. It provides 234,720 adaptive logic modules (ALMs) (622,000 logic elements (LEs)), 939,000 flip-flops, 50 Mb of block RAM and 256 variable-precision DSP blocks. It offers up to 840 user I/O pins and 48 GX transceivers at up to 14.1 Gb/s, with hard PCI Express Gen3 blocks. It is available in 5 packages, from the F1152 (HF35) (35 × 35 mm) to the F1932 (NF45) (45 × 45 mm). Designs are built with Altera Quartus Prime.
Specifications
| Vendor | Altera |
|---|---|
| Family | Stratix V |
| Series | Stratix |
| Process | 28 nm |
| Configuration memory | SRAM |
| Adaptive logic modules (ALMs) | 234,720 |
| Logic block | adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions) |
| LUT4 equivalent (approx.) | ≈469,440 |
| Logic elements (LEs) | 622,000 |
| Flip-flops | 939,000 |
| Block RAM | 50 Mb (2560 × 20 Kb) |
| DSP (variable-precision DSP block) | 256 |
| Clock management tiles | 28 |
| Max. user I/O | 840 |
|---|---|
| GX transceivers | 48 × 14.1 Gb/s |
| PCI Express | 4× Gen3 |
| Analog / monitor | None |
| CoreScore | 1,568 SERV cores (de5_net) |
| Design tool | Altera Quartus Prime |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| F1152 (HF35) | 35 × 35 | 1.0 | 552 | 24 |
| F1152 (KF35) | 35 × 35 | 1.0 | 432 | 36 |
| F1517 (KF40) | 40 × 40 | 1.0 | 696 | 36 |
| F1517 (NF40) | 40 × 40 | 1.0 | 600 | 48 |
| F1932 (NF45) | 45 × 45 | 1.0 | 840 | 48 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Alternatives to the 5SGXA7
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| XCVU065AMD Virtex UltraScale | 358,080 LUT6 | 783K SLC | 600 | 44.3 Mb | 520 | 40 GTH/GTY 30.5 Gb/s | Gen3 | — |
| XCVU080AMD Virtex UltraScale | 445,712 LUT6 | 975K SLC | 672 | 50 Mb | 832 | 64 GTH/GTY 30.5 Gb/s | Gen3 | — |
| XCVU095AMD Virtex UltraScale | 537,600 LUT6 | 1176K SLC | 768 | 60.8 Mb | 832 | 64 GTH/GTY 30.5 Gb/s | Gen3 | — |
| XCKU095AMD Kintex UltraScale | 537,600 LUT6 | 1176K SLC | 768 | 59.1 Mb | 702 | 64 GTH/GTY 16.3 Gb/s | Gen3 | — |
| GX 400Altera Stratix 10 GX/SX | 128,160 ALMs | 378K LE | 648 | 30 Mb | 374 | 24 XCVR/XCVR 28.3 Gb/s | Gen3 | — |
| GX 650Altera Stratix 10 GX/SX | 207,360 ALMs | 612K LE | 1,152 | 49 Mb | 392 | 24 XCVR/XCVR 28.3 Gb/s | Gen3 | — |
Compare side by side: 5SGXA7 vs XCVU065, 5SGXA7 vs XCVU080, 5SGXA7 vs XCVU095.
Compare the 5SGXA7 with up to three other FPGAs.
5SGXA7 quick facts
How many LUTs does the 5SGXA7 have?
The 5SGXA7 has 234,720 adaptive logic modules (ALMs) (622,000 logic elements (les) as published by Altera). Logic block: adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions).
How many DSP blocks does the 5SGXA7 have?
The 5SGXA7 has 256 variable-precision DSP blocks and 50 Mb of block RAM.
Does the 5SGXA7 have transceivers?
Yes, 48 GX transceivers at up to 14.1 Gb/s.
What is the CoreScore of the 5SGXA7?
The 5SGXA7 fits 1,568 SERV RISC-V cores in the CoreScore benchmark (board: de5_net). CoreScore counts how many of these bit-serial cores the device and its tools can place and route, a practical measure of usable logic.
What are the alternatives to the 5SGXA7?
Devices of similar size in other families include XCVU065 (AMD Virtex UltraScale), XCVU080 (AMD Virtex UltraScale), XCVU095 (AMD Virtex UltraScale).
Which software is used to design with the 5SGXA7?
Designs for the 5SGXA7 are built with Altera Quartus Prime.
Other Stratix V devices
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| 5SGSD3 | 89,000 ALMs | 236K LE | 600 | 13.4 Mb | 432 | 24 GX 14.1 Gb/s | Gen3 | — |
| 5SGXA3 | 128,300 ALMs | 340K LE | 256 | 18.7 Mb | 696 | 36 GX 14.1 Gb/s | Gen3 | — |
| 5SGSD4 | 135,840 ALMs | 360K LE | 1,044 | 18.7 Mb | 696 | 36 GX 14.1 Gb/s | Gen3 | — |
| 5SGXA4 | 158,500 ALMs | 420K LE | 256 | 37.1 Mb | 696 | 36 GX 14.1 Gb/s | Gen3 | — |
| 5SGTC5 | 160,400 ALMs | 425K LE | 256 | 45 Mb | 600 | 36 GT/GX 28.05 Gb/s | Gen3 | — |
| 5SGSD5 | 172,600 ALMs | 457K LE | 1,590 | 39.3 Mb | 696 | 36 GX 14.1 Gb/s | Gen3 | 1,152 storeypeak |
| 5SGXA5 | 185,000 ALMs | 490K LE | 256 | 45 Mb | 840 | 48 GX 14.1 Gb/s | Gen3 | — |
| 5SGXB5 | 185,000 ALMs | 490K LE | 399 | 41 Mb | 600 | 66 GX 14.1 Gb/s | Gen3 | — |
| 5SGSD6 | 220,000 ALMs | 583K LE | 1,775 | 45.3 Mb | 840 | 48 GX 14.1 Gb/s | Gen3 | — |
| 5SGXB6 | 225,400 ALMs | 597K LE | 399 | 52 Mb | 600 | 66 GX 14.1 Gb/s | Gen3 | — |
| 5SGTC7 | 234,720 ALMs | 622K LE | 256 | 50 Mb | 600 | 36 GT/GX 28.05 Gb/s | Gen3 | — |
| 5SGXA7 | 234,720 ALMs | 622K LE | 256 | 50 Mb | 840 | 48 GX 14.1 Gb/s | Gen3 | 1,568 de5_net |
| 5SGSD8 | 262,400 ALMs | 695K LE | 1,963 | 50.1 Mb | 840 | 48 GX 14.1 Gb/s | Gen3 | — |
| 5SGXA9 | 317,000 ALMs | 840K LE | 352 | 51.6 Mb | 840 | 48 GX 14.1 Gb/s | Gen3 | — |
| 5SGXB9 | 317,000 ALMs | 840K LE | 352 | 51.6 Mb | 600 | 66 GX 14.1 Gb/s | Gen3 | — |
| 5SEE9 | 317,000 ALMs | 840K LE | 352 | 51.6 Mb | 840 | — | — | — |
| 5SGXAB | 359,200 ALMs | 952K LE | 352 | 51.6 Mb | 840 | 48 GX 14.1 Gb/s | Gen3 | — |
| 5SGXBB | 359,200 ALMs | 952K LE | 352 | 51.6 Mb | 600 | 66 GX 14.1 Gb/s | Gen3 | — |
| 5SEEB | 359,200 ALMs | 952K LE | 352 | 51.6 Mb | 840 | — | — | — |
Source: Stratix V Device Overview, 683258 (2024.12.20). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet. CoreScore result from the CoreScore world ranking (olofk/corescore).