GX 850
AlteraStratix 10 GX/SXSoCThe GX 850 is a Stratix 10 GX/SX FPGA from Altera, built on a 14 nm process. It provides 284,960 adaptive logic modules (ALMs) (841,000 logic elements (LEs)), about 569,920 LUT4 equivalents, 68 Mb of block RAM and 2,016 variable-precision DSP blocks. It offers up to 688 user I/O pins and 48 XCVR/XCVR transceivers at up to 28.3 Gb/s, with hard PCI Express Gen3 x16 blocks. It comes in a single package, the F1760 (42.5 × 42.5 mm). Designs are built with Altera Quartus Prime.
Specifications
| Vendor | Altera |
|---|---|
| Family | Stratix 10 GX/SX |
| Series | Stratix |
| Process | 14 nm |
| Configuration memory | SRAM |
| LUT4-equivalent capacity | 569,920 |
| Adaptive logic modules (ALMs) | 284,960 |
| LUT note | Adaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions |
| Logic elements (LEs) | 841,000 |
| Distributed RAM | 4,096 Kb |
| Block RAM | 68 Mb (3477 × 20 Kb) |
| DSP (variable-precision DSP block) | 2,016 |
| Max. user I/O | 688 |
|---|---|
| XCVR transceivers | 32 × 28.3 Gb/s |
| XCVR transceivers | 16 × 17.4 Gb/s |
| PCI Express | 2× Gen3 x16 |
| Analog / monitor | None |
| Design tool | Altera Quartus Prime |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| F1760 | 42.5 × 42.5 | 1.0 | 688 | 48 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Alternatives to the GX 850
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| XCKU15PAMD Kintex UltraScale+ | 837K 523K LUT6 | 1143K SLC | 1,968 | 34.6 Mb | 668 | 76 GTH/GTY 32.75 Gb/s | Gen3 |
| 10AX066Altera Arria 10 | 501K 251K ALMs | 865K LE | 1,687 | 41.7 Mb | 696 | 48 XCVR 17.4 Gb/s | Gen3 |
| 10AT090Altera Arria 10 | 679K 340K ALMs | 1180K LE | 1,518 | 47.3 Mb | 624 | 78 XCVR/XCVR 25.78 Gb/s | Gen3 |
| XCVU3PAMD Virtex UltraScale+ | 630K 394K LUT6 | 862K SLC | 2,280 | 25.3 Mb | 520 | 40 GTY 32.75 Gb/s | Gen3 |
| 10AT115Altera Arria 10 | 854K 427K ALMs | 1506K LE | 1,518 | 53 Mb | 624 | 78 XCVR/XCVR 25.78 Gb/s | Gen3 |
| XCKU11PAMD Kintex UltraScale+ | 478K 299K LUT6 | 653K SLC | 2,928 | 21.1 Mb | 512 | 52 GTH/GTY 32.75 Gb/s | Gen3 |
Compare side by side: GX 850 vs XCKU15P, GX 850 vs 10AX066, GX 850 vs 10AT090, GX 850 vs XCVU3P, GX 850 vs 10AT115.
GX 850 quick facts
How many LUTs does the GX 850 have?
The GX 850 has 284,960 adaptive logic modules (ALMs), about 569,920 LUT4 equivalents (841,000 logic elements (les) as published by Altera).
How many DSP blocks does the GX 850 have?
The GX 850 has 2,016 variable-precision DSP blocks and 68 Mb of block RAM.
Does the GX 850 have transceivers?
Yes, 48 XCVR/XCVR transceivers at up to 28.3 Gb/s.
What are the alternatives to the GX 850?
Devices of similar size in other families include XCKU15P (AMD Kintex UltraScale+), 10AX066 (Altera Arria 10), 10AT090 (Altera Arria 10).
Which software is used to design with the GX 850?
Designs for the GX 850 are built with Altera Quartus Prime.
Other Stratix 10 GX/SX devices
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| GX 400 | 256K 128K ALMs | 378K LE | 648 | 30 Mb | 374 | 24 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 400 | 256K 128K ALMs | 378K LE | 648 | 30 Mb | 374 | 24 XCVR/XCVR 28.3 Gb/s | Gen3 |
| GX 650 | 415K 207K ALMs | 612K LE | 1,152 | 49 Mb | 392 | 24 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 650 | 415K 207K ALMs | 612K LE | 1,152 | 49 Mb | 392 | 24 XCVR/XCVR 28.3 Gb/s | Gen3 |
| GX 850 | 570K 285K ALMs | 841K LE | 2,016 | 68 Mb | 688 | 48 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 850 | 570K 285K ALMs | 841K LE | 2,016 | 68 Mb | 688 | 48 XCVR/XCVR 28.3 Gb/s | Gen3 |
| GX 1100 | 899K 449K ALMs | 1325K LE | 2,592 | 107 Mb | 688 | 48 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 1100 | 899K 449K ALMs | 1325K LE | 2,592 | 107 Mb | 688 | 48 XCVR/XCVR 28.3 Gb/s | Gen3 |
| GX 1650 | 1101K 551K ALMs | 1624K LE | 3,145 | 114 Mb | 704 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 1650 | 1101K 551K ALMs | 1624K LE | 3,145 | 114 Mb | 704 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
| GX 2100 | 1359K 680K ALMs | 2005K LE | 3,744 | 127 Mb | 704 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 2100 | 1359K 680K ALMs | 2005K LE | 3,744 | 127 Mb | 704 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
| GX 2500 | 1642K 821K ALMs | 2422K LE | 5,011 | 195 Mb | 1,160 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 2500 | 1642K 821K ALMs | 2422K LE | 5,011 | 195 Mb | 1,160 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
| GX 2800 | 1866K 933K ALMs | 2753K LE | 5,760 | 229 Mb | 1,160 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
| SX 2800 | 1866K 933K ALMs | 2753K LE | 5,760 | 229 Mb | 1,160 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 |
Source: Altera Stratix 10 GX/SX FPGA Product Table, 2025.09.23. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.