FPGA & adaptive SoC databook · online editionRev. 2026.10

SX 400

AlteraStratix 10 GX/SXSoC

The SX 400 is a Stratix 10 GX/SX SoC FPGA from Altera, built on a 14 nm process. It provides 128,160 adaptive logic modules (ALMs) (378,000 logic elements (LEs)), about 256,320 LUT4 equivalents, 30 Mb of block RAM and 648 variable-precision DSP blocks. Its processing system includes four Arm Cortex-A53 cores running at up to 1.5 GHz. The programmable logic offers up to 374 user I/O pins and 24 XCVR/XCVR transceivers at up to 28.3 Gb/s, with hard PCI Express Gen3 x16 blocks. It comes in a single package, the F1152 (35 × 35 mm). Designs are built with Altera Quartus Prime.

256KLUT4-equivalent
128KALMs
648variable-precision DSP blocks
30 MbBlock RAM
374Max. user I/O
24Transceivers (28.3 Gb/s)
4× A53Hard processor

Specifications

VendorAltera
FamilyStratix 10 GX/SX
SeriesStratix
Process14 nm
Configuration memorySRAM
LUT4-equivalent capacity256,320
Adaptive logic modules (ALMs)128,160
   LUT noteAdaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions
Logic elements (LEs)378,000
Distributed RAM2,048 Kb
Block RAM30 Mb (1537 × 20 Kb)
DSP (variable-precision DSP block)648
Max. user I/O374
XCVR transceivers16 × 28.3 Gb/s
XCVR transceivers8 × 17.4 Gb/s
PCI Express (PL) Gen3 x16
Analog / monitorNone
Hard processor4× Arm Cortex-A53 @ 1.5 GHz
Design toolAltera Quartus Prime

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
F115235 × 351.037424

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the SX 400

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
A5E 052AAltera Agilex 5 E-Series355K 178K ALMs524K LE67625.2 Mb50424 XCVR 28 Gb/sGen4
A5E 052BAltera Agilex 5 E-Series355K 178K ALMs524K LE67625.2 Mb50424 XCVR 17 Gb/sGen4
A5E 043AAltera Agilex 5 E-Series294K 147K ALMs434K LE56420.5 Mb50416 XCVR 28 Gb/sGen4
A5E 043BAltera Agilex 5 E-Series294K 147K ALMs434K LE56420.5 Mb50416 XCVR 17 Gb/sGen4
Ti260Efinix Titanium≈264K 264K LEs264K LE96019.7 Mb31016 SERDES 16 Gb/sGen4
Ti240Efinix Titanium232K 232K LUT4237K LE86017.6 Mb33716 SERDES 16 Gb/sGen4

Compare side by side: SX 400 vs A5E 052A, SX 400 vs A5E 052B, SX 400 vs A5E 043A, SX 400 vs A5E 043B.

SX 400 quick facts

How many LUTs does the SX 400 have?

The SX 400 has 128,160 adaptive logic modules (ALMs), about 256,320 LUT4 equivalents (378,000 logic elements (les) as published by Altera).

How many DSP blocks does the SX 400 have?

The SX 400 has 648 variable-precision DSP blocks and 30 Mb of block RAM.

Does the SX 400 have transceivers?

Yes, 24 XCVR/XCVR transceivers at up to 28.3 Gb/s.

Does the SX 400 have a processor?

Yes. It includes a hard 4× Arm Cortex-A53 processor.

What are the alternatives to the SX 400?

Devices of similar size in other families include A5E 052A (Altera Agilex 5 E-Series), A5E 052B (Altera Agilex 5 E-Series), A5E 043A (Altera Agilex 5 E-Series).

Which software is used to design with the SX 400?

Designs for the SX 400 are built with Altera Quartus Prime.

Other Stratix 10 GX/SX devices

DeviceLUT4-eq.Vendor logicDSPBlock RAMMax I/OTransceiversPCIe
GX 400256K 128K ALMs378K LE64830 Mb37424 XCVR/XCVR 28.3 Gb/sGen3
SX 400256K 128K ALMs378K LE64830 Mb37424 XCVR/XCVR 28.3 Gb/sGen3
GX 650415K 207K ALMs612K LE1,15249 Mb39224 XCVR/XCVR 28.3 Gb/sGen3
SX 650415K 207K ALMs612K LE1,15249 Mb39224 XCVR/XCVR 28.3 Gb/sGen3
GX 850570K 285K ALMs841K LE2,01668 Mb68848 XCVR/XCVR 28.3 Gb/sGen3
SX 850570K 285K ALMs841K LE2,01668 Mb68848 XCVR/XCVR 28.3 Gb/sGen3
GX 1100899K 449K ALMs1325K LE2,592107 Mb68848 XCVR/XCVR 28.3 Gb/sGen3
SX 1100899K 449K ALMs1325K LE2,592107 Mb68848 XCVR/XCVR 28.3 Gb/sGen3
GX 16501101K 551K ALMs1624K LE3,145114 Mb70496 XCVR/XCVR 28.3 Gb/sGen3
SX 16501101K 551K ALMs1624K LE3,145114 Mb70496 XCVR/XCVR 28.3 Gb/sGen3
GX 21001359K 680K ALMs2005K LE3,744127 Mb70496 XCVR/XCVR 28.3 Gb/sGen3
SX 21001359K 680K ALMs2005K LE3,744127 Mb70496 XCVR/XCVR 28.3 Gb/sGen3
GX 25001642K 821K ALMs2422K LE5,011195 Mb1,16096 XCVR/XCVR 28.3 Gb/sGen3
SX 25001642K 821K ALMs2422K LE5,011195 Mb1,16096 XCVR/XCVR 28.3 Gb/sGen3
GX 28001866K 933K ALMs2753K LE5,760229 Mb1,16096 XCVR/XCVR 28.3 Gb/sGen3
SX 28001866K 933K ALMs2753K LE5,760229 Mb1,16096 XCVR/XCVR 28.3 Gb/sGen3

Source: Altera Stratix 10 GX/SX FPGA Product Table, 2025.09.23. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.