XCSU45P
AMDSpartan UltraScale+The XCSU45P is a Spartan UltraScale+ FPGA from AMD, built on a 16 nm process. It provides 24,000 LUT6 look-up tables (53,000 system logic cells), about 38,400 LUT4 equivalents, 48,000 flip-flops, 2.5 Mb of block RAM and 96 DSP slices. It offers up to 262 user I/O pins and 4 GTH transceivers at up to 16.3 Gb/s, with hard PCI Express Gen4 x4 blocks. It is available in 3 packages, from the CMVE529 (12 × 12 mm) to the SBVB625 (21 × 21 mm). Temperature grades: extended, industrial. Designs are built with AMD Vivado.
Specifications
| Vendor | AMD |
|---|---|
| Family | Spartan UltraScale+ |
| Series | UltraScale+ |
| Process | 16 nm |
| Configuration memory | SRAM |
| LUT4-equivalent capacity | 38,400 |
| Look-up tables (LUT6) | 24,000 |
| System logic cells | 53,000 |
| Flip-flops | 48,000 |
| Distributed RAM | 543 Kb |
| Block RAM | 2.5 Mb (72 × 36 Kb) |
| DSP (DSP slice) | 96 |
| Clock management tiles | 3 |
| Max. user I/O | 262 |
|---|---|
| HD I/O | 210 |
| HP I/O | 52 |
| GTH transceivers | 4 × 16.3 Gb/s |
| PCI Express | Gen4 x4 |
| Analog / monitor | System Monitor |
| Design tool | AMD Vivado |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| CMVE529 | 12 × 12 | 0.5 | 240 | 4 |
| SBVD529 | 19 × 19 | 0.8 | 262 | 4 |
| SBVB625 | 21 × 21 | 0.8 | 240 | — |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Extended (E) | 0 to 100 °C | -1, -2 |
| Industrial (I) | −40 to 100 °C | -1, -2, -1L |
Alternatives to the XCSU45P
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| XC7A35TAMD Artix-7 | 33.3K 20.8K LUT6 | 33.3K LC | 90 | 1.8 Mb | 250 | 4 GTP 6.6 Gb/s | Gen2 |
| LFCPNX-50Lattice CertusPro-NX | 43.3K 43.3K LUT4 | 52K LC | 96 | 1.7 Mb | 269 | 4 SERDES 10.3125 Gb/s | Gen3 |
| LFE5UM-45Lattice ECP5 | 44K 44K LUT4 | — | 72 | 1.9 Mb | 245 | 4 SERDES 3.2 Gb/s | — |
| LFE5UM5G-45Lattice ECP5 | 44K 44K LUT4 | — | 72 | 1.9 Mb | 245 | 4 SERDES 5 Gb/s | — |
| XC7A50TAMD Artix-7 | 52.2K 32.6K LUT6 | 52.2K LC | 120 | 2.6 Mb | 250 | 4 GTP 6.6 Gb/s | Gen2 |
| LFMXO5-55TDQLattice MachXO5-NX | 31.7K 31.7K LUT4 | 38K LC | 93 | 0.3 Mb | 297 | 2 SERDES | Gen2 |
Compare side by side: XCSU45P vs XC7A35T, XCSU45P vs LFCPNX-50, XCSU45P vs LFE5UM-45, XCSU45P vs LFE5UM5G-45, XCSU45P vs LFMXO5-55TDQ.
XCSU45P quick facts
How many LUTs does the XCSU45P have?
The XCSU45P has 24,000 LUT6 look-up tables, about 38,400 LUT4 equivalents (53,000 system logic cells as published by AMD).
How many DSP blocks does the XCSU45P have?
The XCSU45P has 96 DSP slices and 2.5 Mb of block RAM.
Does the XCSU45P have transceivers?
Yes, 4 GTH transceivers at up to 16.3 Gb/s.
What are the alternatives to the XCSU45P?
Devices of similar size in other families include XC7A35T (AMD Artix-7), LFCPNX-50 (Lattice CertusPro-NX), LFE5UM-45 (Lattice ECP5).
Which software is used to design with the XCSU45P?
Designs for the XCSU45P are built with AMD Vivado.
Other Spartan UltraScale+ devices
| Device | LUT4-eq. | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe |
|---|---|---|---|---|---|---|---|
| XCSU10P | 8K 5K LUT6 | 11K SLC | 24 | 1.7 Mb | 304 | — | — |
| XCSU25P | 16K 10K LUT6 | 22K SLC | 36 | 1.7 Mb | 304 | — | — |
| XCSU35P | 25.6K 16K LUT6 | 36K SLC | 48 | 1.7 Mb | 304 | — | — |
| XCSU45P | 38.4K 24K LUT6 | 53K SLC | 96 | 2.5 Mb | 262 | 4 GTH 16.3 Gb/s | Gen4 |
| XCSU60P | 48K 30K LUT6 | 66K SLC | 144 | 3.4 Mb | 262 | 4 GTH 16.3 Gb/s | Gen4 |
| XCSU65P | 48K 30K LUT6 | 66K SLC | 144 | 3.8 Mb | 478 | 4 GTH 16.3 Gb/s | Gen4 |
| XCSU100P | 73.6K 46K LUT6 | 101K SLC | 144 | 5.1 Mb | 478 | 4 GTH 16.3 Gb/s | Gen4 |
| XCSU150P | 101K 63K LUT6 | 138K SLC | 384 | 5.9 Mb | 572 | 8 GTH 16.3 Gb/s | Gen4 |
| XCSU200P | 160K 100K LUT6 | 219K SLC | 384 | 6.8 Mb | 572 | 8 GTH 16.3 Gb/s | Gen4 |
Source: AMD UltraScale+ FPGAs Product Selection Guide, XMP103 (v2.8). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.