FPGA & adaptive SoC databook · online editionRev. 2026.10

XCVU080

AMDVirtex UltraScale

The XCVU080 is a Virtex UltraScale FPGA from AMD, built on a 20 nm process. It provides 445,712 LUT6 look-up tables (975,000 system logic cells), 891,424 flip-flops, 50 Mb of block RAM and 672 DSP slices. It offers up to 832 user I/O pins and 64 GTH/GTY transceivers at up to 30.5 Gb/s, with hard PCI Express Gen3 blocks. It is available in 5 packages, from the C1517 (40 × 40 mm) to the B2104 (47.5 × 47.5 mm). Temperature grades: extended, industrial. Designs are built with AMD Vivado.

445,712LUTs (LUT6)
672DSP slices
50 MbBlock RAM
832Max. user I/O
64Transceivers (30.5 Gb/s)

Specifications

VendorAMD
FamilyVirtex UltraScale
SeriesUltraScale
Process20 nm
Configuration memorySRAM
Look-up tables (LUT6)445,712
   Logic block6-input look-up table, fracturable into two LUT5 with shared inputs
LUT4 equivalent (approx.)≈713,139
System logic cells975,000
Flip-flops891,424
Distributed RAM3,980 Kb
Block RAM50 Mb (1421 × 36 Kb)
DSP (DSP slice)672
Clock management tiles16
Max. user I/O832
   HP I/O780
Differential pairs384
GTH transceivers32 × 16.3 Gb/s
GTY transceivers32 × 30.5 Gb/s
PCI Express4× Gen3
150G Interlaken6
100G Ethernet MAC4
Analog / monitorSystem Monitor
Design toolAMD Vivado

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
C151740 × 401.052040
D151740 × 401.033864
B176042.5 × 42.51.070248
A210447.5 × 47.51.083252
B210447.5 × 47.51.070264

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature gradeJunction rangeSpeed grades
Extended (E)0 to 100 °C-1H, -2, -3
Industrial (I)−40 to 100 °C-1, -2

Alternatives to the XCVU080

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
XCKU095AMD Kintex UltraScale537,600 LUT61176K SLC76859.1 Mb70264 GTH/GTY 16.3 Gb/sGen3—
5SGXABAltera Stratix V359,200 ALMs952K LE35251.6 Mb84048 GX 14.1 Gb/sGen3—
5SGXBBAltera Stratix V359,200 ALMs952K LE35251.6 Mb60066 GX 14.1 Gb/sGen3—
5SGXA9Altera Stratix V317,000 ALMs840K LE35251.6 Mb84048 GX 14.1 Gb/sGen3—
5SGXB9Altera Stratix V317,000 ALMs840K LE35251.6 Mb60066 GX 14.1 Gb/sGen3—
5SGXB6Altera Stratix V225,400 ALMs597K LE39952 Mb60066 GX 14.1 Gb/sGen3—

Compare side by side: XCVU080 vs XCKU095, XCVU080 vs 5SGXAB, XCVU080 vs 5SGXBB, XCVU080 vs 5SGXA9, XCVU080 vs 5SGXB9, XCVU080 vs 5SGXB6.

Compare the XCVU080 with up to three other FPGAs.

XCVU080 quick facts

How many LUTs does the XCVU080 have?

The XCVU080 has 445,712 LUT6 look-up tables (975,000 system logic cells as published by AMD). Logic block: 6-input look-up table, fracturable into two LUT5 with shared inputs.

How many DSP blocks does the XCVU080 have?

The XCVU080 has 672 DSP slices and 50 Mb of block RAM.

Does the XCVU080 have transceivers?

Yes, 64 GTH/GTY transceivers at up to 30.5 Gb/s.

What are the alternatives to the XCVU080?

Devices of similar size in other families include XCKU095 (AMD Kintex UltraScale), 5SGXAB (Altera Stratix V), 5SGXBB (Altera Stratix V).

Which software is used to design with the XCVU080?

Designs for the XCVU080 are built with AMD Vivado.

Other Virtex UltraScale devices

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
XCVU065358,080 LUT6783K SLC60044.3 Mb52040 GTH/GTY 30.5 Gb/sGen3—
XCVU080445,712 LUT6975K SLC67250 Mb83264 GTH/GTY 30.5 Gb/sGen3—
XCVU095537,600 LUT61176K SLC76860.8 Mb83264 GTH/GTY 30.5 Gb/sGen3—
XCVU125716,160 LUT61567K SLC1,20088.6 Mb83280 GTH/GTY 30.5 Gb/sGen3—
XCVU160926,400 LUT62027K SLC1,560115.2 Mb702104 GTH/GTY 30.5 Gb/sGen3—
XCVU1901,074,240 LUT62350K SLC1,800132.9 Mb702120 GTH/GTY 30.5 Gb/sGen3—
XCVU4402,532,960 LUT65541K SLC2,88088.6 Mb1,45648 GTH 16.3 Gb/sGen3—

Source: AMD UltraScale FPGAs Product Selection Guide, XMP102 (v1.7). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.