XCVU440
AMDVirtex UltraScaleThe XCVU440 is a Virtex UltraScale FPGA from AMD, built on a 20 nm process. It provides 2,532,960 LUT6 look-up tables (5,541,000 system logic cells), 5,065,920 flip-flops, 88.6 Mb of block RAM and 2,880 DSP slices. It offers up to 1,456 user I/O pins and 48 GTH transceivers at up to 16.3 Gb/s, with hard PCI Express Gen3 blocks. It is available in 2 packages, from the B2377 (50 × 50 mm) to the A2892 (55 × 55 mm). Temperature grades: commercial, extended, industrial. Designs are built with AMD Vivado.
Specifications
| Vendor | AMD |
|---|---|
| Family | Virtex UltraScale |
| Series | UltraScale |
| Process | 20 nm |
| Configuration memory | SRAM |
| Look-up tables (LUT6) | 2,532,960 |
| Logic block | 6-input look-up table, fracturable into two LUT5 with shared inputs |
| LUT4 equivalent (approx.) | ≈4,052,736 |
| System logic cells | 5,541,000 |
| Flip-flops | 5,065,920 |
| Distributed RAM | 28,710 Kb |
| Block RAM | 88.6 Mb (2520 × 36 Kb) |
| DSP (DSP slice) | 2,880 |
| Clock management tiles | 30 |
| Max. user I/O | 1,456 |
|---|---|
| HP I/O | 1,404 |
| Differential pairs | 672 |
| GTH transceivers | 48 × 16.3 Gb/s |
| PCI Express | 6× Gen3 |
| 100G Ethernet MAC | 3 |
| Analog / monitor | System Monitor |
| Design tool | AMD Vivado |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| B2377 | 50 × 50 | 1.0 | 1,300 | 36 |
| A2892 | 55 × 55 | 1.0 | 1,456 | 48 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Commercial (C) | 0 to 85 °C | -1 |
| Extended (E) | 0 to 100 °C | -2, -3 |
| Industrial (I) | −40 to 100 °C | -1, -2 |
Alternatives to the XCVU440
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| XCVU19PAMD Virtex UltraScale+ | 4,086,000 LUT6 | 8938K SLC | 3,840 | 75.9 Mb | 2,072 | 80 GTY 32.75 Gb/s | Gen3 | 10,000 vu19p |
| XC7V2000TAMD Virtex-7 | 1,221,600 LUT6 | 1955K LC | 2,160 | 45.4 Mb | 1,200 | 36 GTX 12.5 Gb/s | Gen2 | — |
| GX 2100Altera Stratix 10 GX/SX | 679,680 ALMs | 2005K LE | 3,744 | 127 Mb | 704 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 | — |
| XC7VX1140TAMD Virtex-7 | 712,000 LUT6 | 1139K LC | 3,360 | 66.1 Mb | 1,100 | 96 GTH 13.1 Gb/s | Gen3 | — |
| GX 2500Altera Stratix 10 GX/SX | 821,150 ALMs | 2422K LE | 5,011 | 195 Mb | 1,160 | 96 XCVR/XCVR 28.3 Gb/s | Gen3 | — |
| XCVU23PAMD Virtex UltraScale+ | 1,030,000 LUT6 | 2252K SLC | 1,320 | 74.3 Mb | 644 | 38 GTY/GTM 58 Gb/s | Gen3 | — |
Compare side by side: XCVU440 vs XCVU19P, XCVU440 vs XC7V2000T, XCVU440 vs GX 2100.
Compare the XCVU440 with up to three other FPGAs.
XCVU440 quick facts
How many LUTs does the XCVU440 have?
The XCVU440 has 2,532,960 LUT6 look-up tables (5,541,000 system logic cells as published by AMD). Logic block: 6-input look-up table, fracturable into two LUT5 with shared inputs.
How many DSP blocks does the XCVU440 have?
The XCVU440 has 2,880 DSP slices and 88.6 Mb of block RAM.
Does the XCVU440 have transceivers?
Yes, 48 GTH transceivers at up to 16.3 Gb/s.
What are the alternatives to the XCVU440?
Devices of similar size in other families include XCVU19P (AMD Virtex UltraScale+), XC7V2000T (AMD Virtex-7), GX 2100 (Altera Stratix 10 GX/SX).
Which software is used to design with the XCVU440?
Designs for the XCVU440 are built with AMD Vivado.
Other Virtex UltraScale devices
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| XCVU065 | 358,080 LUT6 | 783K SLC | 600 | 44.3 Mb | 520 | 40 GTH/GTY 30.5 Gb/s | Gen3 | — |
| XCVU080 | 445,712 LUT6 | 975K SLC | 672 | 50 Mb | 832 | 64 GTH/GTY 30.5 Gb/s | Gen3 | — |
| XCVU095 | 537,600 LUT6 | 1176K SLC | 768 | 60.8 Mb | 832 | 64 GTH/GTY 30.5 Gb/s | Gen3 | — |
| XCVU125 | 716,160 LUT6 | 1567K SLC | 1,200 | 88.6 Mb | 832 | 80 GTH/GTY 30.5 Gb/s | Gen3 | — |
| XCVU160 | 926,400 LUT6 | 2027K SLC | 1,560 | 115.2 Mb | 702 | 104 GTH/GTY 30.5 Gb/s | Gen3 | — |
| XCVU190 | 1,074,240 LUT6 | 2350K SLC | 1,800 | 132.9 Mb | 702 | 120 GTH/GTY 30.5 Gb/s | Gen3 | — |
| XCVU440 | 2,532,960 LUT6 | 5541K SLC | 2,880 | 88.6 Mb | 1,456 | 48 GTH 16.3 Gb/s | Gen3 | — |
Source: AMD UltraScale FPGAs Product Selection Guide, XMP102 (v1.7). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.