5SGXBB

The 5SGXBB is a Stratix V FPGA from Altera, built on a 28 nm process. It provides 359,200 adaptive logic modules (ALMs) (952,000 logic elements (LEs)), 1,437,000 flip-flops, 51.6 Mb of block RAM and 352 variable-precision DSP blocks. It offers up to 600 user I/O pins and 66 GX transceivers at up to 14.1 Gb/s, with hard PCI Express Gen3 blocks. It comes in a single package, the H1760 (RH43) (45 × 45 mm). Designs are built with Altera Quartus Prime.

Specifications

Packages

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the 5SGXBB

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Compare side by side: 5SGXBB vs XCVU065, 5SGXBB vs XCVU080, 5SGXBB vs XCKU095.

Compare the 5SGXBB with up to three other FPGAs.

5SGXBB quick facts

How many LUTs does the 5SGXBB have?

The 5SGXBB has 359,200 adaptive logic modules (ALMs) (952,000 logic elements (les) as published by Altera). Logic block: adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions).

How many DSP blocks does the 5SGXBB have?

The 5SGXBB has 352 variable-precision DSP blocks and 51.6 Mb of block RAM.

Does the 5SGXBB have transceivers?

Yes, 66 GX transceivers at up to 14.1 Gb/s.

What are the alternatives to the 5SGXBB?

Devices of similar size in other families include XCVU065 (AMD Virtex UltraScale), XCVU080 (AMD Virtex UltraScale), XCKU095 (AMD Kintex UltraScale).

Which software is used to design with the 5SGXBB?

Designs for the 5SGXBB are built with Altera Quartus Prime.

Other Stratix V devices

Source: Stratix V Device Overview, 683258 (2024.12.20). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.