FPGA & adaptive SoC databook · online editionRev. 2026.10

XCZU47DR

AMDZynq UltraScale+ RFSoCSoC

The XCZU47DR is a Zynq UltraScale+ RFSoC FPGA from AMD, built on a 16 nm process. It provides 425,000 LUT6 look-up tables (930,000 system logic cells), 850,000 flip-flops, 38 Mb of block RAM plus 22.5 Mb of UltraRAM and 4,272 DSP slices. Its processing system includes four Arm Cortex-A53 cores running at up to 1.3 GHz, a dual Arm Cortex-R5F real-time processor. The programmable logic offers up to 347 user I/O pins and 16 GTY transceivers at up to 28.21 Gb/s, with hard PCI Express Gen4 x8 blocks. It is available in 2 packages, from the E1156 (35 × 35 mm) to the G1517 (40 × 40 mm). Temperature grades: industrial, extended. Designs are built with AMD Vivado.

425,000LUTs (LUT6)
4,272DSP slices
38 MbBlock RAM
22.5 MbUltraRAM
347Max. user I/O
16Transceivers (28.21 Gb/s)
4× A53Hard processor

Specifications

VendorAMD
FamilyZynq UltraScale+ RFSoC
SeriesUltraScale+
Process16 nm
Configuration memorySRAM
Look-up tables (LUT6)425,000
   Logic block6-input look-up table, fracturable into two LUT5 with shared inputs
LUT4 equivalent (approx.)≈680,000
System logic cells930,000
Flip-flops850,000
Distributed RAM13,312 Kb
Block RAM38 Mb
UltraRAM22.5 Mb
DSP (DSP slice)4,272
Max. user I/O347
GTY transceivers16 × 28.21 Gb/s
PCI Express (PL)2× Gen4 x8
100G Ethernet MAC2
Analog / monitor8× 14-bit RF-ADC (5 GSPS), 8× 14-bit RF-DAC (9.85 GSPS)
Hard processor4× Arm Cortex-A53 @ 1.3 GHz
Real-time processorDual Arm Cortex-R5F
Design toolAMD Vivado

Packages

PackageSize (mm)Pitch (mm)User I/OPS I/OTransceivers
E115635 × 351.01522148
G151740 × 401.034721416

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature gradeJunction rangeSpeed grades
Industrial (I)−40 to 100 °C-1, -1L, -2, -2L
Extended (E)0 to 100 °C-1, -2

Alternatives to the XCZU47DR

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
XCZU15EGAMD Zynq UltraScale+ MPSoC341,000 LUT6747K SLC3,52826.2 Mb32824 GTH 16.3 Gb/s——
A5D 110Altera Agilex 5 D-Series364,000 ALMs1074K LE3,312104.3 Mb61624 XCVR 28 Gb/sGen4—
AGF 008Altera Agilex 7 F-Series259,200 ALMs765K LE2,29674 Mb57632 XCVR 58 Gb/s——
XC2VE3804AMD Versal AI Edge Gen 2543,104 LUT61188K SLC2,06447.2 Mb55620 GTYP 32.75 Gb/sGen5—
XC2VE3858AMD Versal AI Edge Gen 2543,104 LUT61188K SLC2,06447.2 Mb55620 GTYP 32.75 Gb/sGen5—
XC2VM3858AMD Versal Prime Gen 2543,104 LUT61188K SLC2,06447.2 Mb55620 GTYP 32.75 Gb/sGen5—

Compare side by side: XCZU47DR vs XCZU15EG, XCZU47DR vs A5D 110, XCZU47DR vs AGF 008.

Compare the XCZU47DR with up to three other FPGAs.

XCZU47DR quick facts

How many LUTs does the XCZU47DR have?

The XCZU47DR has 425,000 LUT6 look-up tables (930,000 system logic cells as published by AMD). Logic block: 6-input look-up table, fracturable into two LUT5 with shared inputs.

How many DSP blocks does the XCZU47DR have?

The XCZU47DR has 4,272 DSP slices and 38 Mb of block RAM plus 22.5 Mb of UltraRAM.

Does the XCZU47DR have transceivers?

Yes, 16 GTY transceivers at up to 28.21 Gb/s.

Does the XCZU47DR have a processor?

Yes. It includes a hard 4× Arm Cortex-A53 processor.

What are the alternatives to the XCZU47DR?

Devices of similar size in other families include XCZU15EG (AMD Zynq UltraScale+ MPSoC), A5D 110 (Altera Agilex 5 D-Series), AGF 008 (Altera Agilex 7 F-Series).

Which software is used to design with the XCZU47DR?

Designs for the XCZU47DR are built with AMD Vivado.

Other Zynq UltraScale+ RFSoC devices

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
XCZU64DR150,000 LUT6328K SLC1,87215.8 Mb1548 GTY 28.21 Gb/s——
XCZU63DR180,000 LUT6393K SLC1,20017.6 Mb1544 GTY 28.21 Gb/s——
XCZU42DR224,000 LUT6489K SLC1,87222.8 Mb1528 GTY 28.21 Gb/s——
XCZU65DR224,000 LUT6489K SLC1,87222.8 Mb1548 GTY 28.21 Gb/s——
XCZU67DR224,000 LUT6489K SLC1,87222.8 Mb1548 GTY 28.21 Gb/s——
XCZU25DR310,000 LUT6678K SLC3,14527.8 Mb3478 GTY 28.21 Gb/sGen3—
XCZU21DR425,000 LUT6930K SLC4,27238 Mb28016 GTY 28.21 Gb/sGen3—
XCZU27DR425,000 LUT6930K SLC4,27238 Mb34716 GTY 28.21 Gb/sGen3—
XCZU28DR425,000 LUT6930K SLC4,27238 Mb34716 GTY 28.21 Gb/sGen3—
XCZU29DR425,000 LUT6930K SLC4,27238 Mb40816 GTY 28.21 Gb/sGen3—
XCZU39DR425,000 LUT6930K SLC4,27238 Mb40816 GTY 28.21 Gb/sGen3—
XCZU43DR425,000 LUT6930K SLC4,27238 Mb34716 GTY 28.21 Gb/sGen4—
XCZU46DR425,000 LUT6930K SLC4,27238 Mb36016 GTY 28.21 Gb/sGen4—
XCZU47DR425,000 LUT6930K SLC4,27238 Mb34716 GTY 28.21 Gb/sGen4—
XCZU48DR425,000 LUT6930K SLC4,27238 Mb34716 GTY 28.21 Gb/sGen4—
XCZU49DR425,000 LUT6930K SLC4,27238 Mb40816 GTY 28.21 Gb/sGen4—

Source: AMD Zynq UltraScale+ RFSoC Product Selection Guide, XMP105 (v1.12.1). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.