Mach-N2 MH20
LatticeMach-N2The Mach-N2 MH20 is a Mach-N2 FPGA from Lattice, built on a 16 nm process. It provides 135,000 LUT4 look-up tables (220,000 logic cells), 12 Mb of block RAM and 520 18×18 multipliers. It offers up to 248 user I/O pins and 4 SERDES transceivers at up to 16 Gb/s. It comes in a single package, the CBG484 (18 × 18 mm). Temperature grades: commercial, industrial. Designs are built with Lattice Radiant.
Specifications
| Vendor | Lattice |
|---|---|
| Family | Mach-N2 |
| Series | Nexus 2 |
| Process | 16 nm |
| Configuration memory | Internal flash |
| Look-up tables (LUT4) | 135,000 |
| Logic block | 4-input look-up table |
| Logic cells | 220,000 |
| Distributed RAM | 1,400 Kb |
| Block RAM | 12 Mb (306 × 36 Kb) |
| DSP (18×18 multiplier) | 520 |
| Max. user I/O | 248 |
|---|---|
| SERDES transceivers | 4 × 16 Gb/s |
| PCI Express | None |
| Analog / monitor | None |
| Design tool | Lattice Radiant |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| CBG484 | 18 × 18 | 0.8 | 248 | 4 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Commercial (C) | 0 to 85 °C | — |
| Industrial (I) | −40 to 100 °C | — |
Alternatives to the Mach-N2 MH20
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| Certus-N2 CT20Lattice Certus-N2 | 135,000 LUT4 | 220K LC | 520 | 12 Mb | 298 | 8 SERDES 16 Gb/s | — | — |
| XC7K160TAMD Kintex-7 | 101,400 LUT6 | 162K LC | 600 | 11.4 Mb | 400 | 8 GTX 12.5 Gb/s | Gen2 | 481 marble |
| 5AGTC3Altera Arria V | 58,900 ALMs | 156K LE | 396 | 10.3 Mb | 416 | 7 XCVR/XCVR 10.3125 Gb/s | Gen2 | — |
| 5AGXA3Altera Arria V | 58,900 ALMs | 156K LE | 396 | 10.3 Mb | 416 | 9 XCVR 6.5536 Gb/s | Gen2 | — |
| LAV-AT-G30Lattice Avant-G | 163,000 LUT4 | 262K LC | 700 | 14.4 Mb | 298 | 12 SERDES 12.5 Gb/s | — | — |
| LAV-AT-X30Lattice Avant-X | 163,000 LUT4 | 262K LC | 700 | 14.4 Mb | 298 | 12 SERDES 25 Gb/s | — | — |
Compare side by side: Mach-N2 MH20 vs Certus-N2 CT20, Mach-N2 MH20 vs XC7K160T, Mach-N2 MH20 vs 5AGTC3.
Compare the Mach-N2 MH20 with up to three other FPGAs.
Mach-N2 MH20 quick facts
How many LUTs does the Mach-N2 MH20 have?
The Mach-N2 MH20 has 135,000 LUT4 look-up tables (220,000 logic cells as published by Lattice). Logic block: 4-input look-up table.
How many DSP blocks does the Mach-N2 MH20 have?
The Mach-N2 MH20 has 520 18×18 multipliers and 12 Mb of block RAM.
Does the Mach-N2 MH20 have transceivers?
Yes, 4 SERDES transceivers at up to 16 Gb/s.
What are the alternatives to the Mach-N2 MH20?
Devices of similar size in other families include Certus-N2 CT20 (Lattice Certus-N2), XC7K160T (AMD Kintex-7), 5AGTC3 (Altera Arria V).
Which software is used to design with the Mach-N2 MH20?
Designs for the Mach-N2 MH20 are built with Lattice Radiant.
Other Mach-N2 devices
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| Mach-N2 MH06 | 40,000 LUT4 | 65K LC | 120 | 4 Mb | 196 | 4 SERDES 16 Gb/s | — | — |
| Mach-N2 MH10 | 61,000 LUT4 | 100K LC | 240 | 5.5 Mb | 196 | 4 SERDES 16 Gb/s | — | — |
| Mach-N2 MH16 | 98,000 LUT4 | 160K LC | 360 | 8 Mb | 248 | 4 SERDES 16 Gb/s | — | — |
| Mach-N2 MH21D | 132,000 LUT4 | 215K LC | 520 | 10.4 Mb | 236 | 4 SERDES 16 Gb/s | — | — |
| Mach-N2 MH20 | 135,000 LUT4 | 220K LC | 520 | 12 Mb | 248 | 4 SERDES 16 Gb/s | — | — |
Source: Lattice Mach-N2 product page, Family Table, retrieved 2026-10-26. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.