M2S060
MicrochipSmartFusion2SoCThe M2S060 is a SmartFusion2 SoC FPGA from Microchip, built on a 65 nm process. It provides 56,520 LUT4 look-up tables, 56,520 flip-flops, 1.2 Mb of block RAM and 72 18×18 math blocks (MACC). Its processing system includes a single Arm Cortex-M3 core running at up to 166 MHz. The processing system adds its own MSS with Gigabit Ethernet, high-speed USB, CAN, 2× UART, 2× SPI and 2× I2C. The programmable logic offers up to 395 user I/O pins and 4 SERDES transceivers at up to 5 Gb/s, with hard PCI Express Gen2 blocks. It is available in 5 packages, from the FCSG325 (11 × 11 mm) to the FG676 (27 × 27 mm). Temperature grades: commercial, industrial, military, automotive. Designs are built with Microchip Libero SoC.
Specifications
| Vendor | Microchip |
|---|---|
| Family | SmartFusion2 |
| Series | Flash FPGAs |
| Process | 65 nm |
| Configuration memory | Non-volatile (flash) |
| Look-up tables (LUT4) | 56,520 |
| Logic block | 4-input look-up table |
| LUT note | Logic elements are a 4-input LUT plus a flip-flop (Microchip) |
| Logic elements (LEs) | 56,520 |
| Flip-flops | 56,520 |
| Block RAM | 1.2 Mb (69 × 18 Kb) |
| In-package memory | 256 KB eNVM, 64 KB eSRAM, 72 × 1 Kb uSRAM |
| DSP (18×18 math block (MACC)) | 72 |
| Clock management tiles | 6 |
| Max. user I/O | 395 |
|---|---|
| SERDES transceivers | 4 × 5 Gb/s |
| PCI Express (PL) | 2× Gen2 |
| Hard memory controller | DDR2/DDR3 (1 × 18) |
| Analog / monitor | None |
| Hard processor | 1× Arm Cortex-M3 @ 166 MHz |
| PS connectivity | MSS with Gigabit Ethernet, high-speed USB, CAN, 2× UART, 2× SPI and 2× I2C |
| Design tool | Microchip Libero SoC |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| FCSG325 | 11 × 11 | 0.5 | 200 | 2 |
| VFG400 | 17 × 17 | 0.8 | 207 | 4 |
| FG484 | 23 × 23 | 1.0 | 267 | 4 |
| FG676 | 27 × 27 | 1.0 | 387 | 4 |
| VFG784 | 23 × 23 | 0.8 | 395 | 4 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Commercial (C) | 0 to 85 °C | STD, -1 |
| Industrial (I) | −40 to 100 °C | STD, -1 |
| Military (M) | — | STD, -1 |
| Automotive (A) | — | STD, -1 |
Alternatives to the M2S060
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| XC7Z012SAMD Zynq 7000 | 34,400 LUT6 | 55K LC | 120 | 2.5 Mb | 150 | 4 GTP 6.25 Gb/s | Gen2 | — |
| 5CSXC5Altera Cyclone V | 32,070 ALMs | 85K LE | 87 | 3.9 Mb | 288 | 9 XCVR 3.125 Gb/s | Gen1 | — |
| 5CSTD5Altera Cyclone V | 32,070 ALMs | 85K LE | 87 | 3.9 Mb | 288 | 9 XCVR 6.144 Gb/s | Gen2 | — |
| 5CSXC4Altera Cyclone V | 15,880 ALMs | 40K LE | 84 | 2.6 Mb | 145 | 6 XCVR 3.125 Gb/s | Gen1 | — |
| A5E 008BAltera Agilex 5 E-Series | 28,880 ALMs | 85.2K LE | 116 | 4.5 Mb | 392 | 4 XCVR 17 Gb/s | Gen4 | 182 axe5000 |
| MPFS025TMicrochip PolarFire SoC | 23,000 LUT4 | 23K LE | 68 | 1.6 Mb | 108 | 4 SERDES 12.5 Gb/s | Gen2 | — |
Compare side by side: M2S060 vs XC7Z012S, M2S060 vs 5CSXC5, M2S060 vs 5CSTD5.
Compare the M2S060 with up to three other FPGAs.
M2S060 quick facts
How many LUTs does the M2S060 have?
The M2S060 has 56,520 LUT4 look-up tables. Logic block: 4-input look-up table.
How many DSP blocks does the M2S060 have?
The M2S060 has 72 18×18 math blocks (MACC) and 1.2 Mb of block RAM.
Does the M2S060 have transceivers?
Yes, 4 SERDES transceivers at up to 5 Gb/s.
Does the M2S060 have a processor?
Yes. It includes a hard 1× Arm Cortex-M3 processor.
What are the alternatives to the M2S060?
Devices of similar size in other families include XC7Z012S (AMD Zynq 7000), 5CSXC5 (Altera Cyclone V), 5CSTD5 (Altera Cyclone V).
Which software is used to design with the M2S060?
Designs for the M2S060 are built with Microchip Libero SoC.
Other SmartFusion2 devices
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| M2S005 | 6,060 LUT4 | 6.1K LE | 11 | 0.2 Mb | 209 | — | — | — |
| M2S010 | 12,084 LUT4 | 12.1K LE | 22 | 0.4 Mb | 233 | 4 SERDES 5 Gb/s | Gen2 | — |
| M2S025 | 27,696 LUT4 | 27.7K LE | 34 | 0.5 Mb | 267 | 4 SERDES 5 Gb/s | Gen2 | — |
| M2S050 | 56,340 LUT4 | 56.3K LE | 72 | 1.2 Mb | 377 | 8 SERDES 5 Gb/s | Gen2 | — |
| M2S060 | 56,520 LUT4 | 56.5K LE | 72 | 1.2 Mb | 395 | 4 SERDES 5 Gb/s | Gen2 | — |
| M2S090 | 86,184 LUT4 | 86.2K LE | 84 | 1.9 Mb | 425 | 4 SERDES 5 Gb/s | Gen2 | — |
| M2S150 | 146,124 LUT4 | 146K LE | 240 | 4.2 Mb | 574 | 16 SERDES 5 Gb/s | Gen2 | — |
Source: SmartFusion 2 SoC FPGA Product Brief, DS50003317D. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.