FPGA & adaptive SoC databook · online editionRev. 2026.10

EP2AGX95

AlteraArria II

The EP2AGX95 is an Arria II FPGA from Altera, built on a 40 nm process. It provides 37,470 adaptive logic modules (ALMs) (89,000 logic elements (LEs)), 74,940 flip-flops, 5.4 Mb of block RAM and 448 18×18 multipliers. It offers up to 452 user I/O pins and 12 XCVR transceivers at up to 6.375 Gb/s, with hard PCI Express Gen1 blocks. It is available in 3 packages, from the F572 (25 × 25 mm) to the F1152 (35 × 35 mm). Designs are built with Altera Quartus Prime.

37,470ALMs
44818×18 multipliers
5.4 MbBlock RAM
452Max. user I/O
12Transceivers (6.375 Gb/s)

Specifications

VendorAltera
FamilyArria II
SeriesArria
Process40 nm
Configuration memorySRAM
Adaptive logic modules (ALMs)37,470
   Logic blockadaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions)
   LUT noteAdaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions
LUT4 equivalent (approx.)≈74,940
Logic elements (LEs)89,000
Flip-flops74,940
Distributed RAM1,171 Kb
Block RAM5.4 Mb (612 × 9 Kb)
DSP (18×18 multiplier)448
Clock management tiles6
Max. user I/O452
XCVR transceivers12 × 6.375 Gb/s
PCI Express Gen1
Analog / monitorNone
Design toolAltera Quartus Prime

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
F57225 × 251.02608
F78029 × 291.037212
F115235 × 351.045212

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the EP2AGX95

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
XC6VLX75TAMD Virtex-646,560 LUT674.5K LC2885.5 Mb36012 GTX 6.6 Gb/sGen2—
EP4SGX70Altera Stratix IV29,040 ALMs73K LE3846.3 Mb48024 XCVR/XCVR 8.5 Gb/sGen2—
XCAU10PAMD Artix UltraScale+44,000 LUT696K SLC4003.5 Mb22812 GTH 16.3 Gb/sGen4—
EP4SGX110Altera Stratix IV42,240 ALMs106K LE5128.1 Mb48024 XCVR/XCVR 8.5 Gb/sGen2—
Certus-N2 CT16Lattice Certus-N298,000 LUT4160K LC3608 Mb2988 SERDES 16 Gb/s——
MPF100TMicrochip PolarFire109,000 LUT4109K LE3366.9 Mb2848 SERDES 12.7 Gb/sGen2—

Compare side by side: EP2AGX95 vs XC6VLX75T, EP2AGX95 vs EP4SGX70, EP2AGX95 vs XCAU10P, EP2AGX95 vs EP4SGX110.

Compare the EP2AGX95 with up to three other FPGAs.

EP2AGX95 quick facts

How many LUTs does the EP2AGX95 have?

The EP2AGX95 has 37,470 adaptive logic modules (ALMs) (89,000 logic elements (les) as published by Altera). Logic block: adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions).

How many DSP blocks does the EP2AGX95 have?

The EP2AGX95 has 448 18×18 multipliers and 5.4 Mb of block RAM.

Does the EP2AGX95 have transceivers?

Yes, 12 XCVR transceivers at up to 6.375 Gb/s.

What are the alternatives to the EP2AGX95?

Devices of similar size in other families include XC6VLX75T (AMD Virtex-6), EP4SGX70 (Altera Stratix IV), XCAU10P (AMD Artix UltraScale+).

Which software is used to design with the EP2AGX95?

Designs for the EP2AGX95 are built with Altera Quartus Prime.

Other Arria II devices

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
EP2AGX4518,050 ALMs43K LE2322.8 Mb3648 XCVR 6.375 Gb/sGen1—
EP2AGX6525,300 ALMs60K LE3124.3 Mb3648 XCVR 6.375 Gb/sGen1—
EP2AGX9537,470 ALMs89K LE4485.4 Mb45212 XCVR 6.375 Gb/sGen1—
EP2AGX12549,640 ALMs118K LE5766.4 Mb45212 XCVR 6.375 Gb/sGen1—
EP2AGX19076,120 ALMs181K LE6567.4 Mb61216 XCVR 6.375 Gb/sGen1—
EP2AGZ22589,600 ALMs224K LE80010.8 Mb73424 XCVR 6.375 Gb/sGen2—
EP2AGX260102,600 ALMs244K LE7368.3 Mb61216 XCVR 6.375 Gb/sGen1—
EP2AGZ300119,200 ALMs298K LE92014.3 Mb73424 XCVR 6.375 Gb/sGen2—
EP2AGZ350139,400 ALMs349K LE1,04016 Mb73424 XCVR 6.375 Gb/sGen2—

Source: Altera Arria II FPGA Family Overview Product Table, Product Catalog 2015. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.