M2GL150

MicrochipIGLOO2

The M2GL150 is an IGLOO2 FPGA from Microchip, built on a 65 nm process. It provides 146,124 LUT4 look-up tables, 146,124 flip-flops, 4.2 Mb of block RAM and 240 18×18 math blocks (MACC). It offers up to 574 user I/O pins and 16 SERDES transceivers at up to 5 Gb/s, with hard PCI Express Gen2 blocks. It is available in 3 packages, from the FCS536 (16 × 16 mm) to the FC1152 (35 × 35 mm). Temperature grades: commercial, industrial, military. Designs are built with Microchip Libero SoC.

146,124LUTs (LUT4)

24018×18 math blocks (MACC)

4.2 MbBlock RAM

574Max. user I/O

16Transceivers (5 Gb/s)

Specifications

Vendor	Microchip
Family	IGLOO2
Series	Flash FPGAs
Process	65 nm
Configuration memory	Non-volatile (flash)
Look-up tables (LUT4)	146,124
Logic block	4-input look-up table
LUT note	Logic elements are a 4-input LUT plus a flip-flop (Microchip)
Logic elements (LEs)	146,124
Flip-flops	146,124
Block RAM	4.2 Mb (236 × 18 Kb)
In-package memory	512 KB eNVM, 64 KB eSRAM, 240 × 1 Kb uSRAM
DSP (18×18 math block (MACC))	240
Clock management tiles	8

Max. user I/O	574
SERDES transceivers	16 × 5 Gb/s
PCI Express	4× Gen2
Hard memory controller	DDR2/DDR3 (2 × 36)
Analog / monitor	None
Design tool	Microchip Libero SoC

Packages

Package	Size (mm)	Pitch (mm)	User I/O	Transceivers
FCS536	16 × 16	0.5	293	4
FCV484	19 × 19	0.8	248	4
FC1152	35 × 35	1.0	574	16

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature grade	Junction range	Speed grades
Commercial (C)	0 to 85 °C	STD, -1
Industrial (I)	−40 to 100 °C	STD, -1
Military (M)	—	STD, -1

Alternatives to the M2GL150

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
EP4CGX110Altera Cyclone IV	109,000 LUT4	109K LE	280	5.8 Mb	475	8 XCVR 3.125 Gb/s	Gen2	—
GW5AT-138Gowin Arora V	138,240 LUT4	—	298	6 Mb	312	8 SERDES 12.5 Gb/s	Gen3	—
XC7A100TAMD Artix-7	63,400 LUT6	101K LC	240	4.7 Mb	300	8 GTP 6.6 Gb/s	Gen2	306 arty_a7_100t
EP4CGX150Altera Cyclone IV	150,000 LUT4	150K LE	360	6.3 Mb	475	8 XCVR 3.125 Gb/s	Gen2	—
5CGXC7Altera Cyclone V	56,480 ALMs	150K LE	156	6.7 Mb	480	9 XCVR 3.125 Gb/s	Gen1	—
5CGTD7Altera Cyclone V	56,480 ALMs	150K LE	156	6.7 Mb	480	9 XCVR 6.144 Gb/s	Gen2	—

Compare side by side: M2GL150 vs EP4CGX110, M2GL150 vs GW5AT-138, M2GL150 vs XC7A100T.

Compare the M2GL150 with up to three other FPGAs.

M2GL150 quick facts

How many LUTs does the M2GL150 have?

The M2GL150 has 146,124 LUT4 look-up tables. Logic block: 4-input look-up table.

How many DSP blocks does the M2GL150 have?

The M2GL150 has 240 18×18 math blocks (MACC) and 4.2 Mb of block RAM.

Does the M2GL150 have transceivers?

Yes, 16 SERDES transceivers at up to 5 Gb/s.

What are the alternatives to the M2GL150?

Devices of similar size in other families include EP4CGX110 (Altera Cyclone IV), GW5AT-138 (Gowin Arora V), XC7A100T (AMD Artix-7).

Which software is used to design with the M2GL150?

Designs for the M2GL150 are built with Microchip Libero SoC.

Other IGLOO2 devices

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
M2GL005	6,060 LUT4	6.1K LE	11	0.2 Mb	209	—	—	—
M2GL010	12,084 LUT4	12.1K LE	22	0.4 Mb	233	4 SERDES 5 Gb/s	Gen2	—
M2GL025	27,696 LUT4	27.7K LE	34	0.5 Mb	267	4 SERDES 5 Gb/s	Gen2	—
M2GL050	56,340 LUT4	56.3K LE	72	1.2 Mb	377	8 SERDES 5 Gb/s	Gen2	—
M2GL060	56,520 LUT4	56.5K LE	72	1.2 Mb	387	4 SERDES 5 Gb/s	Gen2	—
M2GL090	86,184 LUT4	86.2K LE	84	1.9 Mb	425	4 SERDES 5 Gb/s	Gen2	—
M2GL150	146,124 LUT4	146K LE	240	4.2 Mb	574	16 SERDES 5 Gb/s	Gen2	—

Source: IGLOO2 FPGA Product Brief, PB0121 rev. 15.0. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.