M2GL025
MicrochipIGLOO2The M2GL025 is an IGLOO2 FPGA from Microchip, built on a 65 nm process. It provides 27,696 LUT4 look-up tables, 27,696 flip-flops, 0.5 Mb of block RAM and 34 18×18 math blocks (MACC). It offers up to 267 user I/O pins and 4 SERDES transceivers at up to 5 Gb/s, with hard PCI Express Gen2 blocks. It is available in 4 packages, from the FCS325 (11 × 11 mm) to the FG484 (23 × 23 mm). Temperature grades: commercial, industrial, military, automotive. Designs are built with Microchip Libero SoC.
Specifications
| Vendor | Microchip |
|---|---|
| Family | IGLOO2 |
| Series | Flash FPGAs |
| Process | 65 nm |
| Configuration memory | Non-volatile (flash) |
| Look-up tables (LUT4) | 27,696 |
| Logic block | 4-input look-up table |
| LUT note | Logic elements are a 4-input LUT plus a flip-flop (Microchip) |
| Logic elements (LEs) | 27,696 |
| Flip-flops | 27,696 |
| Block RAM | 0.5 Mb (31 × 18 Kb) |
| In-package memory | 256 KB eNVM, 64 KB eSRAM, 34 × 1 Kb uSRAM |
| DSP (18×18 math block (MACC)) | 34 |
| Clock management tiles | 6 |
| Max. user I/O | 267 |
|---|---|
| SERDES transceivers | 4 × 5 Gb/s |
| PCI Express | Gen2 |
| Hard memory controller | DDR2/DDR3 (1 × 18) |
| Analog / monitor | None |
| Design tool | Microchip Libero SoC |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| FCS325 | 11 × 11 | 0.5 | 180 | 2 |
| VF256 | 14 × 14 | 0.8 | 138 | 2 |
| VF400 | 17 × 17 | 0.8 | 207 | 4 |
| FG484 | 23 × 23 | 1.0 | 267 | 4 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Commercial (C) | 0 to 85 °C | STD, -1 |
| Industrial (I) | −40 to 100 °C | STD, -1 |
| Military (M) | — | STD, -1 |
| Automotive (A) | — | STD, -1 |
Alternatives to the M2GL025
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| EP4CGX22Altera Cyclone IV | 21,000 LUT4 | 21K LE | 40 | 0.7 Mb | 150 | 4 XCVR 3.125 Gb/s | Gen2 | — |
| LFE5UM-25Lattice ECP5 | 24,000 LUT4 | — | 28 | 1 Mb | 197 | 2 SERDES 3.2 Gb/s | — | — |
| LFE5UM5G-25Lattice ECP5 | 24,000 LUT4 | — | 28 | 1 Mb | 197 | 2 SERDES 5 Gb/s | — | — |
| XC7A15TAMD Artix-7 | 10,400 LUT6 | 16.6K LC | 45 | 0.9 Mb | 250 | 4 GTP 6.6 Gb/s | Gen2 | — |
| 5CGXC3Altera Cyclone V | 13,460 ALMs | 36K LE | 57 | 1.3 Mb | 208 | 3 XCVR 3.125 Gb/s | Gen1 | — |
| LFMXO5-30TDLattice MachXO5-NX | 25,000 LUT4 | 30K LC | 48 | 0.8 Mb | 368 | 1 SERDES | Gen2 | — |
Compare side by side: M2GL025 vs EP4CGX22, M2GL025 vs LFE5UM-25, M2GL025 vs LFE5UM5G-25, M2GL025 vs XC7A15T.
Compare the M2GL025 with up to three other FPGAs.
M2GL025 quick facts
How many LUTs does the M2GL025 have?
The M2GL025 has 27,696 LUT4 look-up tables. Logic block: 4-input look-up table.
How many DSP blocks does the M2GL025 have?
The M2GL025 has 34 18×18 math blocks (MACC) and 0.5 Mb of block RAM.
Does the M2GL025 have transceivers?
Yes, 4 SERDES transceivers at up to 5 Gb/s.
What are the alternatives to the M2GL025?
Devices of similar size in other families include EP4CGX22 (Altera Cyclone IV), LFE5UM-25 (Lattice ECP5), LFE5UM5G-25 (Lattice ECP5).
Which software is used to design with the M2GL025?
Designs for the M2GL025 are built with Microchip Libero SoC.
Other IGLOO2 devices
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| M2GL005 | 6,060 LUT4 | 6.1K LE | 11 | 0.2 Mb | 209 | — | — | — |
| M2GL010 | 12,084 LUT4 | 12.1K LE | 22 | 0.4 Mb | 233 | 4 SERDES 5 Gb/s | Gen2 | — |
| M2GL025 | 27,696 LUT4 | 27.7K LE | 34 | 0.5 Mb | 267 | 4 SERDES 5 Gb/s | Gen2 | — |
| M2GL050 | 56,340 LUT4 | 56.3K LE | 72 | 1.2 Mb | 377 | 8 SERDES 5 Gb/s | Gen2 | — |
| M2GL060 | 56,520 LUT4 | 56.5K LE | 72 | 1.2 Mb | 387 | 4 SERDES 5 Gb/s | Gen2 | — |
| M2GL090 | 86,184 LUT4 | 86.2K LE | 84 | 1.9 Mb | 425 | 4 SERDES 5 Gb/s | Gen2 | — |
| M2GL150 | 146,124 LUT4 | 146K LE | 240 | 4.2 Mb | 574 | 16 SERDES 5 Gb/s | Gen2 | — |
Source: IGLOO2 FPGA Product Brief, PB0121 rev. 15.0. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.