M2GL005

MicrochipIGLOO2

The M2GL005 is an IGLOO2 FPGA from Microchip, built on a 65 nm process. It provides 6,060 LUT4 look-up tables, 6,060 flip-flops, 0.2 Mb of block RAM and 11 18×18 math blocks (MACC). It offers up to 209 user I/O pins. It is available in 4 packages, from the VF256 (14 × 14 mm) to the FG484 (23 × 23 mm). Temperature grades: commercial, industrial, automotive. Designs are built with Microchip Libero SoC.

6,060LUTs (LUT4)

1118×18 math blocks (MACC)

0.2 MbBlock RAM

209Max. user I/O

—Transceivers

Specifications

Vendor	Microchip
Family	IGLOO2
Series	Flash FPGAs
Process	65 nm
Configuration memory	Non-volatile (flash)
Look-up tables (LUT4)	6,060
Logic block	4-input look-up table
LUT note	Logic elements are a 4-input LUT plus a flip-flop (Microchip)
Logic elements (LEs)	6,060
Flip-flops	6,060
Block RAM	0.2 Mb (10 × 18 Kb)
In-package memory	128 KB eNVM, 64 KB eSRAM, 11 × 1 Kb uSRAM
DSP (18×18 math block (MACC))	11
Clock management tiles	2

Max. user I/O	209
Transceivers	None
PCI Express	None
Hard memory controller	DDR2/DDR3 (1 × 18)
Analog / monitor	None
Design tool	Microchip Libero SoC

Packages

Package	Size (mm)	Pitch (mm)	User I/O	Transceivers
VF256	14 × 14	0.8	161	—
VF400	17 × 17	0.8	171	—
TQ144	20 × 20	0.5	84	—
FG484	23 × 23	1.0	209	—

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature grade	Junction range	Speed grades
Commercial (C)	0 to 85 °C	STD, -1
Industrial (I)	−40 to 100 °C	STD, -1
Automotive (A)	—	STD, -1

Alternatives to the M2GL005

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
EP4CE6Altera Cyclone IV	6,000 LUT4	6K LE	15	0.3 Mb	179	—	—	—
10CL006Altera Cyclone 10 LP	6,000 LUT4	6K LE	15	0.3 Mb	176	—	—	—
GW1N-4Gowin LittleBee	4,608 LUT4	—	16	0.2 Mb	218	—	—	—
GW1NR-4Gowin LittleBee	4,608 LUT4	—	16	0.2 Mb	218	—	—	—
XC7S6AMD Spartan-7	3,752 LUT6	6K LC	10	0.2 Mb	100	—	—	—
T8Efinix Trion	— 7.4K LEs, LUTs not published	7.4K LE	8	0.1 Mb	97	—	—	17 xyloni

Compare side by side: M2GL005 vs EP4CE6, M2GL005 vs 10CL006, M2GL005 vs GW1N-4, M2GL005 vs XC7S6, M2GL005 vs T8.

Compare the M2GL005 with up to three other FPGAs.

M2GL005 quick facts

How many LUTs does the M2GL005 have?

The M2GL005 has 6,060 LUT4 look-up tables. Logic block: 4-input look-up table.

How many DSP blocks does the M2GL005 have?

The M2GL005 has 11 18×18 math blocks (MACC) and 0.2 Mb of block RAM.

Does the M2GL005 have transceivers?

No, the M2GL005 has no multi-gigabit transceivers. Its user I/O supports up to 209 pins.

What are the alternatives to the M2GL005?

Devices of similar size in other families include EP4CE6 (Altera Cyclone IV), 10CL006 (Altera Cyclone 10 LP), GW1N-4 (Gowin LittleBee).

Which software is used to design with the M2GL005?

Designs for the M2GL005 are built with Microchip Libero SoC.

Other IGLOO2 devices

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
M2GL005	6,060 LUT4	6.1K LE	11	0.2 Mb	209	—	—	—
M2GL010	12,084 LUT4	12.1K LE	22	0.4 Mb	233	4 SERDES 5 Gb/s	Gen2	—
M2GL025	27,696 LUT4	27.7K LE	34	0.5 Mb	267	4 SERDES 5 Gb/s	Gen2	—
M2GL050	56,340 LUT4	56.3K LE	72	1.2 Mb	377	8 SERDES 5 Gb/s	Gen2	—
M2GL060	56,520 LUT4	56.5K LE	72	1.2 Mb	387	4 SERDES 5 Gb/s	Gen2	—
M2GL090	86,184 LUT4	86.2K LE	84	1.9 Mb	425	4 SERDES 5 Gb/s	Gen2	—
M2GL150	146,124 LUT4	146K LE	240	4.2 Mb	574	16 SERDES 5 Gb/s	Gen2	—

Source: IGLOO2 FPGA Product Brief, PB0121 rev. 15.0. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.