Altera Arria V SoC FPGAs

The Altera Arria V family has 20 devices, built on the 28 nm process, ranging from 28.3K ALMs to 190K ALMs and from 240 to 1,156 variable-precision DSP blocks. It uses adaptive logic modules (ALMs). Transceivers: XCVR, up to 12.5 Gb/s.

Device	LUTs	Vendor logic	DSP	Block RAM	Max I/O	Transceivers	PCIe	CoreScore
5AGXA1	28,302 ALMs	75K LE	240	7.8 Mb	416	9 XCVR 6.5536 Gb/s	Gen2	—
5AGXA3	58,900 ALMs	156K LE	396	10.3 Mb	416	9 XCVR 6.5536 Gb/s	Gen2	—
5AGTC3	58,900 ALMs	156K LE	396	10.3 Mb	416	7 XCVR/XCVR 10.3125 Gb/s	Gen2	—
5AGXA5	71,698 ALMs	190K LE	600	11.5 Mb	544	24 XCVR 6.5536 Gb/s	Gen2	—
5AGZE1	83,020 ALMs	220K LE	800	11.4 Mb	414	24 XCVR 12.5 Gb/s	Gen3	—
5AGXA7	91,680 ALMs	242K LE	800	13.3 Mb	544	24 XCVR 6.5536 Gb/s	Gen2	—
5AGTC7	91,680 ALMs	242K LE	800	13.3 Mb	544	18 XCVR/XCVR 10.3125 Gb/s	Gen2	—
5AGXB1	113,208 ALMs	300K LE	920	14.8 Mb	704	24 XCVR 6.5536 Gb/s	Gen2	—
5ASXB3	132,075 ALMs	350K LE	809	16.9 Mb	540	30 XCVR 6.5536 Gb/s	Gen2	—
5ASTD3	132,075 ALMs	350K LE	809	16.9 Mb	540	46 XCVR/XCVR 10.3125 Gb/s	Gen2	—
5AGZE3	135,840 ALMs	360K LE	1,044	18.7 Mb	414	24 XCVR 12.5 Gb/s	Gen3	—
5AGXB3	136,880 ALMs	362K LE	1,045	16.9 Mb	704	24 XCVR 6.5536 Gb/s	Gen2	—
5AGTD3	136,880 ALMs	362K LE	1,045	16.9 Mb	704	18 XCVR/XCVR 10.3125 Gb/s	Gen2	—
5AGZE5	150,960 ALMs	400K LE	1,092	28.1 Mb	674	36 XCVR 12.5 Gb/s	Gen3	—
5AGXB5	158,491 ALMs	420K LE	1,092	20.1 Mb	704	36 XCVR 6.5536 Gb/s	Gen2	—
5AGZE7	169,800 ALMs	450K LE	1,139	33.2 Mb	674	36 XCVR 12.5 Gb/s	Gen3	—
5ASXB5	174,340 ALMs	462K LE	1,090	22.3 Mb	540	30 XCVR 6.5536 Gb/s	Gen2	—
5ASTD5	174,340 ALMs	462K LE	1,090	22.3 Mb	540	46 XCVR/XCVR 10.3125 Gb/s	Gen2	—
5AGXB7	190,240 ALMs	504K LE	1,156	23.6 Mb	704	36 XCVR 6.5536 Gb/s	Gen2	—
5AGTD7	190,240 ALMs	504K LE	1,156	23.6 Mb	704	26 XCVR/XCVR 10.3125 Gb/s	Gen2	—

Source: Altera Arria V FPGA and SoC Product Table, 2025.12.04.