FPGA & adaptive SoC databook · online editionRev. 2026.10

5AGTD3

AlteraArria VSoC

The 5AGTD3 is an Arria V FPGA from Altera, built on a 28 nm process. It provides 136,880 adaptive logic modules (ALMs) (362,000 logic elements (LEs)), 547,520 flip-flops, 16.9 Mb of block RAM and 1,045 variable-precision DSP blocks. It offers up to 704 user I/O pins and 18 XCVR/XCVR transceivers at up to 10.3125 Gb/s, with hard PCI Express Gen2 x4 blocks. It is available in 3 packages, from the F896 (31 × 31 mm) to the F1517 (40 × 40 mm). Designs are built with Altera Quartus Prime.

136,880ALMs
1,045variable-precision DSP blocks
16.9 MbBlock RAM
704Max. user I/O
18Transceivers (10.3125 Gb/s)

Specifications

VendorAltera
FamilyArria V
SeriesArria
Process28 nm
Configuration memorySRAM
Adaptive logic modules (ALMs)136,880
   Logic blockadaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions)
   LUT noteAdaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions
LUT4 equivalent (approx.)≈273,760
Logic elements (LEs)362,000
Flip-flops547,520
Distributed RAM2,098 Kb
Block RAM16.9 Mb (1726 × 10 Kb)
DSP (variable-precision DSP block)1,045
Max. user I/O704
XCVR transceivers6 × 6.5536 Gb/s
XCVR transceivers12 × 10.3125 Gb/s
PCI Express2× Gen2 x4
Analog / monitorNone
Design toolAltera Quartus Prime

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
F89631 × 311.038414
F115235 × 351.054418
F151740 × 401.070418

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the 5AGTD3

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
EP2AGZ350Altera Arria II139,400 ALMs349K LE1,04016 Mb73424 XCVR 6.375 Gb/sGen2—
MPF300TMicrochip PolarFire300,000 LUT4300K LE92418.6 Mb51216 SERDES 12.7 Gb/sGen2882 polarfireeval
EP2AGZ300Altera Arria II119,200 ALMs298K LE92014.3 Mb73424 XCVR 6.375 Gb/sGen2—
XC7K325TAMD Kintex-7203,800 LUT6326K LC84015.6 Mb50016 GTX 12.5 Gb/sGen2967 genesys2
XC6VLX240TAMD Virtex-6150,720 LUT6241K LC76814.6 Mb72024 GTX 6.6 Gb/sGen2—
5SGSD4Altera Stratix V135,840 ALMs360K LE1,04418.7 Mb69636 GX 14.1 Gb/sGen3—

Compare side by side: 5AGTD3 vs EP2AGZ350, 5AGTD3 vs MPF300T, 5AGTD3 vs EP2AGZ300, 5AGTD3 vs XC7K325T.

Compare the 5AGTD3 with up to three other FPGAs.

5AGTD3 quick facts

How many LUTs does the 5AGTD3 have?

The 5AGTD3 has 136,880 adaptive logic modules (ALMs) (362,000 logic elements (les) as published by Altera). Logic block: adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions).

How many DSP blocks does the 5AGTD3 have?

The 5AGTD3 has 1,045 variable-precision DSP blocks and 16.9 Mb of block RAM.

Does the 5AGTD3 have transceivers?

Yes, 18 XCVR/XCVR transceivers at up to 10.3125 Gb/s.

What are the alternatives to the 5AGTD3?

Devices of similar size in other families include EP2AGZ350 (Altera Arria II), MPF300T (Microchip PolarFire), EP2AGZ300 (Altera Arria II).

Which software is used to design with the 5AGTD3?

Designs for the 5AGTD3 are built with Altera Quartus Prime.

Other Arria V devices

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
5AGXA128,302 ALMs75K LE2407.8 Mb4169 XCVR 6.5536 Gb/sGen2—
5AGXA358,900 ALMs156K LE39610.3 Mb4169 XCVR 6.5536 Gb/sGen2—
5AGTC358,900 ALMs156K LE39610.3 Mb4167 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXA571,698 ALMs190K LE60011.5 Mb54424 XCVR 6.5536 Gb/sGen2—
5AGZE183,020 ALMs220K LE80011.4 Mb41424 XCVR 12.5 Gb/sGen3—
5AGXA791,680 ALMs242K LE80013.3 Mb54424 XCVR 6.5536 Gb/sGen2—
5AGTC791,680 ALMs242K LE80013.3 Mb54418 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXB1113,208 ALMs300K LE92014.8 Mb70424 XCVR 6.5536 Gb/sGen2—
5ASXB3132,075 ALMs350K LE80916.9 Mb54030 XCVR 6.5536 Gb/sGen2—
5ASTD3132,075 ALMs350K LE80916.9 Mb54046 XCVR/XCVR 10.3125 Gb/sGen2—
5AGZE3135,840 ALMs360K LE1,04418.7 Mb41424 XCVR 12.5 Gb/sGen3—
5AGXB3136,880 ALMs362K LE1,04516.9 Mb70424 XCVR 6.5536 Gb/sGen2—
5AGTD3136,880 ALMs362K LE1,04516.9 Mb70418 XCVR/XCVR 10.3125 Gb/sGen2—
5AGZE5150,960 ALMs400K LE1,09228.1 Mb67436 XCVR 12.5 Gb/sGen3—
5AGXB5158,491 ALMs420K LE1,09220.1 Mb70436 XCVR 6.5536 Gb/sGen2—
5AGZE7169,800 ALMs450K LE1,13933.2 Mb67436 XCVR 12.5 Gb/sGen3—
5ASXB5174,340 ALMs462K LE1,09022.3 Mb54030 XCVR 6.5536 Gb/sGen2—
5ASTD5174,340 ALMs462K LE1,09022.3 Mb54046 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXB7190,240 ALMs504K LE1,15623.6 Mb70436 XCVR 6.5536 Gb/sGen2—
5AGTD7190,240 ALMs504K LE1,15623.6 Mb70426 XCVR/XCVR 10.3125 Gb/sGen2—

Source: Altera Arria V FPGA and SoC Product Table, 2025.12.04. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.