FPGA & adaptive SoC databook · online editionRev. 2026.10

5AGTC7

AlteraArria VSoC

The 5AGTC7 is an Arria V FPGA from Altera, built on a 28 nm process. It provides 91,680 adaptive logic modules (ALMs) (242,000 logic elements (LEs)), 366,720 flip-flops, 13.3 Mb of block RAM and 800 variable-precision DSP blocks. It offers up to 544 user I/O pins and 18 XCVR/XCVR transceivers at up to 10.3125 Gb/s, with hard PCI Express Gen2 x4 blocks. It is available in 2 packages, from the F896 (31 × 31 mm) to the F1152 (35 × 35 mm). Designs are built with Altera Quartus Prime.

91,680ALMs
800variable-precision DSP blocks
13.3 MbBlock RAM
544Max. user I/O
18Transceivers (10.3125 Gb/s)

Specifications

VendorAltera
FamilyArria V
SeriesArria
Process28 nm
Configuration memorySRAM
Adaptive logic modules (ALMs)91,680
   Logic blockadaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions)
   LUT noteAdaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions
LUT4 equivalent (approx.)≈183,360
Logic elements (LEs)242,000
Flip-flops366,720
Distributed RAM1,448 Kb
Block RAM13.3 Mb (1366 × 10 Kb)
DSP (variable-precision DSP block)800
Max. user I/O544
XCVR transceivers6 × 6.5536 Gb/s
XCVR transceivers12 × 10.3125 Gb/s
PCI Express2× Gen2 x4
Analog / monitorNone
Design toolAltera Quartus Prime

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
F89631 × 311.038414
F115235 × 351.054418

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the 5AGTC7

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
XC7A200TAMD Artix-7134,600 LUT6215K LC74012.8 Mb50016 GTP 6.6 Gb/sGen2652 nexys_video
XC6VLX195TAMD Virtex-6124,800 LUT6200K LC64012.1 Mb60020 GTX 6.6 Gb/sGen2—
10AX027Altera Arria 10101,620 ALMs354K LE83014.7 Mb38424 XCVR 17.4 Gb/sGen3—
EP2AGZ225Altera Arria II89,600 ALMs224K LE80010.8 Mb73424 XCVR 6.375 Gb/sGen2—
5SGSD3Altera Stratix V89,000 ALMs236K LE60013.4 Mb43224 GX 14.1 Gb/sGen3—
XC6VLX240TAMD Virtex-6150,720 LUT6241K LC76814.6 Mb72024 GTX 6.6 Gb/sGen2—

Compare side by side: 5AGTC7 vs XC7A200T, 5AGTC7 vs XC6VLX195T, 5AGTC7 vs 10AX027, 5AGTC7 vs EP2AGZ225.

Compare the 5AGTC7 with up to three other FPGAs.

5AGTC7 quick facts

How many LUTs does the 5AGTC7 have?

The 5AGTC7 has 91,680 adaptive logic modules (ALMs) (242,000 logic elements (les) as published by Altera). Logic block: adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions).

How many DSP blocks does the 5AGTC7 have?

The 5AGTC7 has 800 variable-precision DSP blocks and 13.3 Mb of block RAM.

Does the 5AGTC7 have transceivers?

Yes, 18 XCVR/XCVR transceivers at up to 10.3125 Gb/s.

What are the alternatives to the 5AGTC7?

Devices of similar size in other families include XC7A200T (AMD Artix-7), XC6VLX195T (AMD Virtex-6), 10AX027 (Altera Arria 10).

Which software is used to design with the 5AGTC7?

Designs for the 5AGTC7 are built with Altera Quartus Prime.

Other Arria V devices

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
5AGXA128,302 ALMs75K LE2407.8 Mb4169 XCVR 6.5536 Gb/sGen2—
5AGXA358,900 ALMs156K LE39610.3 Mb4169 XCVR 6.5536 Gb/sGen2—
5AGTC358,900 ALMs156K LE39610.3 Mb4167 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXA571,698 ALMs190K LE60011.5 Mb54424 XCVR 6.5536 Gb/sGen2—
5AGZE183,020 ALMs220K LE80011.4 Mb41424 XCVR 12.5 Gb/sGen3—
5AGXA791,680 ALMs242K LE80013.3 Mb54424 XCVR 6.5536 Gb/sGen2—
5AGTC791,680 ALMs242K LE80013.3 Mb54418 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXB1113,208 ALMs300K LE92014.8 Mb70424 XCVR 6.5536 Gb/sGen2—
5ASXB3132,075 ALMs350K LE80916.9 Mb54030 XCVR 6.5536 Gb/sGen2—
5ASTD3132,075 ALMs350K LE80916.9 Mb54046 XCVR/XCVR 10.3125 Gb/sGen2—
5AGZE3135,840 ALMs360K LE1,04418.7 Mb41424 XCVR 12.5 Gb/sGen3—
5AGXB3136,880 ALMs362K LE1,04516.9 Mb70424 XCVR 6.5536 Gb/sGen2—
5AGTD3136,880 ALMs362K LE1,04516.9 Mb70418 XCVR/XCVR 10.3125 Gb/sGen2—
5AGZE5150,960 ALMs400K LE1,09228.1 Mb67436 XCVR 12.5 Gb/sGen3—
5AGXB5158,491 ALMs420K LE1,09220.1 Mb70436 XCVR 6.5536 Gb/sGen2—
5AGZE7169,800 ALMs450K LE1,13933.2 Mb67436 XCVR 12.5 Gb/sGen3—
5ASXB5174,340 ALMs462K LE1,09022.3 Mb54030 XCVR 6.5536 Gb/sGen2—
5ASTD5174,340 ALMs462K LE1,09022.3 Mb54046 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXB7190,240 ALMs504K LE1,15623.6 Mb70436 XCVR 6.5536 Gb/sGen2—
5AGTD7190,240 ALMs504K LE1,15623.6 Mb70426 XCVR/XCVR 10.3125 Gb/sGen2—

Source: Altera Arria V FPGA and SoC Product Table, 2025.12.04. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.