FPGA & adaptive SoC databook · online editionRev. 2026.10

5AGZE3

AlteraArria VSoC

The 5AGZE3 is an Arria V FPGA from Altera, built on a 28 nm process. It provides 135,840 adaptive logic modules (ALMs) (360,000 logic elements (LEs)), 543,360 flip-flops, 18.7 Mb of block RAM and 1,044 variable-precision DSP blocks. It offers up to 414 user I/O pins and 24 XCVR transceivers at up to 12.5 Gb/s, with hard PCI Express Gen3 x8 blocks. It is available in 2 packages, from the H780 (29 × 29 mm) to the F1152 (35 × 35 mm). Designs are built with Altera Quartus Prime.

135,840ALMs
1,044variable-precision DSP blocks
18.7 MbBlock RAM
414Max. user I/O
24Transceivers (12.5 Gb/s)

Specifications

VendorAltera
FamilyArria V
SeriesArria
Process28 nm
Configuration memorySRAM
Adaptive logic modules (ALMs)135,840
   Logic blockadaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions)
   LUT noteAdaptive logic modules (ALMs): fracturable 8-input LUTs; each ALM can implement two 4-input functions
LUT4 equivalent (approx.)≈271,680
Logic elements (LEs)360,000
Flip-flops543,360
Distributed RAM4,245 Kb
Block RAM18.7 Mb (957 × 20 Kb)
DSP (variable-precision DSP block)1,044
Max. user I/O414
XCVR transceivers24 × 12.5 Gb/s
PCI Express Gen3 x8
Analog / monitorNone
Design toolAltera Quartus Prime

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
H78029 × 291.034212
F115235 × 351.041424

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Alternatives to the 5AGZE3

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
10AX032Altera Arria 10118,730 ALMs419K LE98517.4 Mb38424 XCVR 17.4 Gb/sGen3—
MPF300TMicrochip PolarFire300,000 LUT4300K LE92418.6 Mb51216 SERDES 12.7 Gb/sGen2882 polarfireeval
LAV-AT-G50Lattice Avant-G255,000 LUT4409K LC1,12022.7 Mb29816 SERDES 12.5 Gb/s——
LAV-AT-X50Lattice Avant-X255,000 LUT4409K LC1,12022.7 Mb29816 SERDES 25 Gb/s——
EP2AGZ350Altera Arria II139,400 ALMs349K LE1,04016 Mb73424 XCVR 6.375 Gb/sGen2—
5SGSD4Altera Stratix V135,840 ALMs360K LE1,04418.7 Mb69636 GX 14.1 Gb/sGen3—

Compare side by side: 5AGZE3 vs 10AX032, 5AGZE3 vs MPF300T, 5AGZE3 vs LAV-AT-G50.

Compare the 5AGZE3 with up to three other FPGAs.

5AGZE3 quick facts

How many LUTs does the 5AGZE3 have?

The 5AGZE3 has 135,840 adaptive logic modules (ALMs) (360,000 logic elements (les) as published by Altera). Logic block: adaptive logic module: fracturable 8-input LUT (one 6-input or two independent 4-input functions).

How many DSP blocks does the 5AGZE3 have?

The 5AGZE3 has 1,044 variable-precision DSP blocks and 18.7 Mb of block RAM.

Does the 5AGZE3 have transceivers?

Yes, 24 XCVR transceivers at up to 12.5 Gb/s.

What are the alternatives to the 5AGZE3?

Devices of similar size in other families include 10AX032 (Altera Arria 10), MPF300T (Microchip PolarFire), LAV-AT-G50 (Lattice Avant-G).

Which software is used to design with the 5AGZE3?

Designs for the 5AGZE3 are built with Altera Quartus Prime.

Other Arria V devices

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
5AGXA128,302 ALMs75K LE2407.8 Mb4169 XCVR 6.5536 Gb/sGen2—
5AGXA358,900 ALMs156K LE39610.3 Mb4169 XCVR 6.5536 Gb/sGen2—
5AGTC358,900 ALMs156K LE39610.3 Mb4167 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXA571,698 ALMs190K LE60011.5 Mb54424 XCVR 6.5536 Gb/sGen2—
5AGZE183,020 ALMs220K LE80011.4 Mb41424 XCVR 12.5 Gb/sGen3—
5AGXA791,680 ALMs242K LE80013.3 Mb54424 XCVR 6.5536 Gb/sGen2—
5AGTC791,680 ALMs242K LE80013.3 Mb54418 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXB1113,208 ALMs300K LE92014.8 Mb70424 XCVR 6.5536 Gb/sGen2—
5ASXB3132,075 ALMs350K LE80916.9 Mb54030 XCVR 6.5536 Gb/sGen2—
5ASTD3132,075 ALMs350K LE80916.9 Mb54046 XCVR/XCVR 10.3125 Gb/sGen2—
5AGZE3135,840 ALMs360K LE1,04418.7 Mb41424 XCVR 12.5 Gb/sGen3—
5AGXB3136,880 ALMs362K LE1,04516.9 Mb70424 XCVR 6.5536 Gb/sGen2—
5AGTD3136,880 ALMs362K LE1,04516.9 Mb70418 XCVR/XCVR 10.3125 Gb/sGen2—
5AGZE5150,960 ALMs400K LE1,09228.1 Mb67436 XCVR 12.5 Gb/sGen3—
5AGXB5158,491 ALMs420K LE1,09220.1 Mb70436 XCVR 6.5536 Gb/sGen2—
5AGZE7169,800 ALMs450K LE1,13933.2 Mb67436 XCVR 12.5 Gb/sGen3—
5ASXB5174,340 ALMs462K LE1,09022.3 Mb54030 XCVR 6.5536 Gb/sGen2—
5ASTD5174,340 ALMs462K LE1,09022.3 Mb54046 XCVR/XCVR 10.3125 Gb/sGen2—
5AGXB7190,240 ALMs504K LE1,15623.6 Mb70436 XCVR 6.5536 Gb/sGen2—
5AGTD7190,240 ALMs504K LE1,15623.6 Mb70426 XCVR/XCVR 10.3125 Gb/sGen2—

Source: Altera Arria V FPGA and SoC Product Table, 2025.12.04. Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.