XC6SLX100T
AMDSpartan-6The XC6SLX100T is a Spartan-6 FPGA from AMD, built on a 45 nm process. It provides 63,288 LUT6 look-up tables (101,261 logic cells), 126,576 flip-flops, 4.7 Mb of block RAM and 180 DSP48A1 slices. It offers up to 498 user I/O pins and 8 GTP transceivers at up to 3.2 Gb/s, with hard PCI Express Gen1 x1 blocks. It is available in 4 packages, from the CSG484 (19 × 19 mm) to the FGG900 (31 × 31 mm). Temperature grades: commercial, industrial. Designs are built with AMD ISE Design Suite.
Specifications
| Vendor | AMD |
|---|---|
| Family | Spartan-6 |
| Series | 6 Series |
| Process | 45 nm |
| Configuration memory | SRAM |
| Look-up tables (LUT6) | 63,288 |
| Logic block | 6-input look-up table, fracturable into two LUT5 with shared inputs |
| LUT4 equivalent (approx.) | ≈101,261 |
| Logic cells | 101,261 |
| Flip-flops | 126,576 |
| Distributed RAM | 976 Kb |
| Block RAM | 4.7 Mb (268 × 18 Kb) |
| DSP (DSP48A1 slice) | 180 |
| Clock management tiles | 6 |
| Max. user I/O | 498 |
|---|---|
| GTP transceivers | 8 × 3.2 Gb/s |
| PCI Express | Gen1 x1 |
| Hard memory controller | 4 × MCB (DDR/DDR2/DDR3/LPDDR) |
| Analog / monitor | None |
| Design tool | AMD ISE Design Suite |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| FGG484 | 23 × 23 | 1.0 | 296 | 4 |
| CSG484 | 19 × 19 | 0.8 | 296 | 4 |
| FGG676 | 27 × 27 | 1.0 | 376 | 8 |
| FGG900 | 31 × 31 | 1.0 | 498 | 8 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Commercial (C) | 0 to 85 °C | -3, -3N, -2 |
| Industrial (I) | −40 to 100 °C | -3, -3N, -2 |
Alternatives to the XC6SLX100T
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| 5CGXC7Altera Cyclone V | 56,480 ALMs | 150K LE | 156 | 6.7 Mb | 480 | 9 XCVR 3.125 Gb/s | Gen1 | — |
| 5CGTD7Altera Cyclone V | 56,480 ALMs | 150K LE | 156 | 6.7 Mb | 480 | 9 XCVR 6.144 Gb/s | Gen2 | — |
| GW5AT-75Gowin Arora V | 86,688 LUT4 | — | 213 | 4.5 Mb | 312 | 8 SERDES 12.5 Gb/s | Gen3 | — |
| XC7A100TAMD Artix-7 | 63,400 LUT6 | 101K LC | 240 | 4.7 Mb | 300 | 8 GTP 6.6 Gb/s | Gen2 | 306 arty_a7_100t |
| LFE3-95EALattice LatticeECP3 | 92,000 LUT4 | — | 128 | 4.3 Mb | 490 | 12 SERDES 3.2 Gb/s | — | — |
| EP4CGX75Altera Cyclone IV | 74,000 LUT4 | 74K LE | 198 | 4.1 Mb | 310 | 8 XCVR 3.125 Gb/s | Gen2 | — |
Compare side by side: XC6SLX100T vs 5CGXC7, XC6SLX100T vs 5CGTD7, XC6SLX100T vs GW5AT-75, XC6SLX100T vs LFE3-95EA.
Compare the XC6SLX100T with up to three other FPGAs.
XC6SLX100T quick facts
How many LUTs does the XC6SLX100T have?
The XC6SLX100T has 63,288 LUT6 look-up tables (101,261 logic cells as published by AMD). Logic block: 6-input look-up table, fracturable into two LUT5 with shared inputs.
How many DSP blocks does the XC6SLX100T have?
The XC6SLX100T has 180 DSP48A1 slices and 4.7 Mb of block RAM.
Does the XC6SLX100T have transceivers?
Yes, 8 GTP transceivers at up to 3.2 Gb/s.
What are the alternatives to the XC6SLX100T?
Devices of similar size in other families include 5CGXC7 (Altera Cyclone V), 5CGTD7 (Altera Cyclone V), GW5AT-75 (Gowin Arora V).
Which software is used to design with the XC6SLX100T?
Designs for the XC6SLX100T are built with AMD ISE Design Suite.
Other Spartan-6 devices
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| XC6SLX4 | 2,400 LUT6 | 3.8K LC | 8 | 0.2 Mb | 132 | — | — | — |
| XC6SLX9 | 5,720 LUT6 | 9.2K LC | 16 | 0.6 Mb | 200 | — | — | — |
| XC6SLX16 | 9,112 LUT6 | 14.6K LC | 32 | 0.6 Mb | 232 | — | — | — |
| XC6SLX25 | 15,032 LUT6 | 24.1K LC | 38 | 0.9 Mb | 266 | — | — | — |
| XC6SLX25T | 15,032 LUT6 | 24.1K LC | 38 | 0.9 Mb | 250 | 2 GTP 3.2 Gb/s | Gen1 | — |
| XC6SLX45 | 27,288 LUT6 | 43.7K LC | 58 | 2 Mb | 358 | — | — | — |
| XC6SLX45T | 27,288 LUT6 | 43.7K LC | 58 | 2 Mb | 296 | 4 GTP 3.2 Gb/s | Gen1 | — |
| XC6SLX75 | 46,648 LUT6 | 74.6K LC | 132 | 3 Mb | 408 | — | — | — |
| XC6SLX75T | 46,648 LUT6 | 74.6K LC | 132 | 3 Mb | 348 | 8 GTP 3.2 Gb/s | Gen1 | — |
| XC6SLX100 | 63,288 LUT6 | 101K LC | 180 | 4.7 Mb | 480 | — | — | — |
| XC6SLX100T | 63,288 LUT6 | 101K LC | 180 | 4.7 Mb | 498 | 8 GTP 3.2 Gb/s | Gen1 | — |
| XC6SLX150 | 92,152 LUT6 | 147K LC | 180 | 4.7 Mb | 576 | — | — | — |
| XC6SLX150T | 92,152 LUT6 | 147K LC | 180 | 4.7 Mb | 540 | 8 GTP 3.2 Gb/s | Gen1 | — |
Source: Spartan-6 Family Overview, DS160 (v2.0). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.