XC6SLX75T
AMDSpartan-6The XC6SLX75T is a Spartan-6 FPGA from AMD, built on a 45 nm process. It provides 46,648 LUT6 look-up tables (74,637 logic cells), 93,296 flip-flops, 3 Mb of block RAM and 132 DSP48A1 slices. It offers up to 348 user I/O pins and 8 GTP transceivers at up to 3.2 Gb/s, with hard PCI Express Gen1 x1 blocks. It is available in 3 packages, from the CSG484 (19 × 19 mm) to the FGG676 (27 × 27 mm). Temperature grades: commercial, industrial. Designs are built with AMD ISE Design Suite.
Specifications
| Vendor | AMD |
|---|---|
| Family | Spartan-6 |
| Series | 6 Series |
| Process | 45 nm |
| Configuration memory | SRAM |
| Look-up tables (LUT6) | 46,648 |
| Logic block | 6-input look-up table, fracturable into two LUT5 with shared inputs |
| LUT4 equivalent (approx.) | ≈74,637 |
| Logic cells | 74,637 |
| Flip-flops | 93,296 |
| Distributed RAM | 692 Kb |
| Block RAM | 3 Mb (172 × 18 Kb) |
| DSP (DSP48A1 slice) | 132 |
| Clock management tiles | 6 |
| Max. user I/O | 348 |
|---|---|
| GTP transceivers | 8 × 3.2 Gb/s |
| PCI Express | Gen1 x1 |
| Hard memory controller | 4 × MCB (DDR/DDR2/DDR3/LPDDR) |
| Analog / monitor | None |
| Design tool | AMD ISE Design Suite |
Packages
| Package | Size (mm) | Pitch (mm) | User I/O | Transceivers |
|---|---|---|---|---|
| FGG484 | 23 × 23 | 1.0 | 268 | 4 |
| CSG484 | 19 × 19 | 0.8 | 292 | 4 |
| FGG676 | 27 × 27 | 1.0 | 348 | 8 |
Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).
Speed and temperature grades
| Temperature grade | Junction range | Speed grades |
|---|---|---|
| Commercial (C) | 0 to 85 °C | -3, -3N, -2 |
| Industrial (I) | −40 to 100 °C | -3, -3N, -2 |
Alternatives to the XC6SLX75T
Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| XC7A75TAMD Artix-7 | 47,200 LUT6 | 75.5K LC | 180 | 3.7 Mb | 300 | 8 GTP 6.6 Gb/s | Gen2 | — |
| LFE3-70EALattice LatticeECP3 | 67,000 LUT4 | — | 128 | 4.3 Mb | 490 | 12 SERDES 3.2 Gb/s | — | — |
| 5CGXC5Altera Cyclone V | 29,080 ALMs | 77K LE | 150 | 4.4 Mb | 336 | 6 XCVR 3.125 Gb/s | Gen1 | — |
| 5CGTD5Altera Cyclone V | 29,080 ALMs | 77K LE | 150 | 4.4 Mb | 336 | 6 XCVR 6.144 Gb/s | Gen2 | — |
| LFE5UM-85Lattice ECP5 | 84,000 LUT4 | — | 156 | 3.7 Mb | 365 | 4 SERDES 3.2 Gb/s | — | — |
| LFE5UM5G-85Lattice ECP5 | 84,000 LUT4 | — | 156 | 3.7 Mb | 365 | 4 SERDES 5 Gb/s | — | — |
Compare side by side: XC6SLX75T vs XC7A75T, XC6SLX75T vs LFE3-70EA, XC6SLX75T vs 5CGXC5, XC6SLX75T vs LFE5UM-85, XC6SLX75T vs LFE5UM5G-85.
Compare the XC6SLX75T with up to three other FPGAs.
XC6SLX75T quick facts
How many LUTs does the XC6SLX75T have?
The XC6SLX75T has 46,648 LUT6 look-up tables (74,637 logic cells as published by AMD). Logic block: 6-input look-up table, fracturable into two LUT5 with shared inputs.
How many DSP blocks does the XC6SLX75T have?
The XC6SLX75T has 132 DSP48A1 slices and 3 Mb of block RAM.
Does the XC6SLX75T have transceivers?
Yes, 8 GTP transceivers at up to 3.2 Gb/s.
What are the alternatives to the XC6SLX75T?
Devices of similar size in other families include XC7A75T (AMD Artix-7), LFE3-70EA (Lattice LatticeECP3), 5CGXC5 (Altera Cyclone V).
Which software is used to design with the XC6SLX75T?
Designs for the XC6SLX75T are built with AMD ISE Design Suite.
Other Spartan-6 devices
| Device | LUTs | Vendor logic | DSP | Block RAM | Max I/O | Transceivers | PCIe | CoreScore |
|---|---|---|---|---|---|---|---|---|
| XC6SLX4 | 2,400 LUT6 | 3.8K LC | 8 | 0.2 Mb | 132 | — | — | — |
| XC6SLX9 | 5,720 LUT6 | 9.2K LC | 16 | 0.6 Mb | 200 | — | — | — |
| XC6SLX16 | 9,112 LUT6 | 14.6K LC | 32 | 0.6 Mb | 232 | — | — | — |
| XC6SLX25 | 15,032 LUT6 | 24.1K LC | 38 | 0.9 Mb | 266 | — | — | — |
| XC6SLX25T | 15,032 LUT6 | 24.1K LC | 38 | 0.9 Mb | 250 | 2 GTP 3.2 Gb/s | Gen1 | — |
| XC6SLX45 | 27,288 LUT6 | 43.7K LC | 58 | 2 Mb | 358 | — | — | — |
| XC6SLX45T | 27,288 LUT6 | 43.7K LC | 58 | 2 Mb | 296 | 4 GTP 3.2 Gb/s | Gen1 | — |
| XC6SLX75 | 46,648 LUT6 | 74.6K LC | 132 | 3 Mb | 408 | — | — | — |
| XC6SLX75T | 46,648 LUT6 | 74.6K LC | 132 | 3 Mb | 348 | 8 GTP 3.2 Gb/s | Gen1 | — |
| XC6SLX100 | 63,288 LUT6 | 101K LC | 180 | 4.7 Mb | 480 | — | — | — |
| XC6SLX100T | 63,288 LUT6 | 101K LC | 180 | 4.7 Mb | 498 | 8 GTP 3.2 Gb/s | Gen1 | — |
| XC6SLX150 | 92,152 LUT6 | 147K LC | 180 | 4.7 Mb | 576 | — | — | — |
| XC6SLX150T | 92,152 LUT6 | 147K LC | 180 | 4.7 Mb | 540 | 8 GTP 3.2 Gb/s | Gen1 | — |
Source: Spartan-6 Family Overview, DS160 (v2.0). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.