FPGA & adaptive SoC databook · online editionRev. 2026.10

XC6SLX4

AMDSpartan-6

The XC6SLX4 is a Spartan-6 FPGA from AMD, built on a 45 nm process. It provides 2,400 LUT6 look-up tables (3,840 logic cells), 4,800 flip-flops, 0.2 Mb of block RAM and 8 DSP48A1 slices. It offers up to 132 user I/O pins. It is available in 3 packages, from the CPG196 (8 × 8 mm) to the TQG144 (20 × 20 mm). Temperature grades: commercial, industrial. Designs are built with AMD ISE Design Suite.

2,400LUTs (LUT6)
8DSP48A1 slices
0.2 MbBlock RAM
132Max. user I/O
—Transceivers

Specifications

VendorAMD
FamilySpartan-6
Series6 Series
Process45 nm
Configuration memorySRAM
Look-up tables (LUT6)2,400
   Logic block6-input look-up table, fracturable into two LUT5 with shared inputs
LUT4 equivalent (approx.)≈3,840
Logic cells3,840
Flip-flops4,800
Distributed RAM75 Kb
Block RAM0.2 Mb (12 × 18 Kb)
DSP (DSP48A1 slice)8
Clock management tiles2
Max. user I/O132
TransceiversNone
PCI ExpressNone
Analog / monitorNone
Design toolAMD ISE Design Suite

Packages

PackageSize (mm)Pitch (mm)User I/OTransceivers
CPG1968 × 80.5106—
TQG14420 × 200.5102—
CSG22513 × 130.8132—

Package names are shown as in the selection guide; the full ordering code adds speed grade and temperature (see the data sheet).

Speed and temperature grades

Temperature gradeJunction rangeSpeed grades
Commercial (C)0 to 85 °C-3, -3N, -2, -1L
Industrial (I)−40 to 100 °C-3, -3N, -2, -1L

Alternatives to the XC6SLX4

Closest matches in other families and vendors by logic, DSP, memory, I/O and transceivers. Check pin compatibility and tools before migrating.

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
LFXP2-5ELattice LatticeXP25,000 LUT4—120.2 Mb172———
XC7S6AMD Spartan-73,752 LUT66K LC100.2 Mb100———
M2GL005Microchip IGLOO26,060 LUT46.1K LE110.2 Mb209———
GW1NS-4Gowin LittleBee4,608 LUT4—160.2 Mb106———
GW1NSR-4Gowin LittleBee4,608 LUT4—160.2 Mb106———
T8Efinix Trion— 7.4K LEs, LUTs not published7.4K LE80.1 Mb97——17 xyloni

Compare side by side: XC6SLX4 vs LFXP2-5E, XC6SLX4 vs XC7S6, XC6SLX4 vs M2GL005.

Compare the XC6SLX4 with up to three other FPGAs.

XC6SLX4 quick facts

How many LUTs does the XC6SLX4 have?

The XC6SLX4 has 2,400 LUT6 look-up tables (3,840 logic cells as published by AMD). Logic block: 6-input look-up table, fracturable into two LUT5 with shared inputs.

How many DSP blocks does the XC6SLX4 have?

The XC6SLX4 has 8 DSP48A1 slices and 0.2 Mb of block RAM.

Does the XC6SLX4 have transceivers?

No, the XC6SLX4 has no multi-gigabit transceivers. Its user I/O supports up to 132 pins.

What are the alternatives to the XC6SLX4?

Devices of similar size in other families include LFXP2-5E (Lattice LatticeXP2), XC7S6 (AMD Spartan-7), M2GL005 (Microchip IGLOO2).

Which software is used to design with the XC6SLX4?

Designs for the XC6SLX4 are built with AMD ISE Design Suite.

Other Spartan-6 devices

DeviceLUTsVendor logicDSPBlock RAMMax I/OTransceiversPCIeCoreScore
XC6SLX42,400 LUT63.8K LC80.2 Mb132———
XC6SLX95,720 LUT69.2K LC160.6 Mb200———
XC6SLX169,112 LUT614.6K LC320.6 Mb232———
XC6SLX2515,032 LUT624.1K LC380.9 Mb266———
XC6SLX25T15,032 LUT624.1K LC380.9 Mb2502 GTP 3.2 Gb/sGen1—
XC6SLX4527,288 LUT643.7K LC582 Mb358———
XC6SLX45T27,288 LUT643.7K LC582 Mb2964 GTP 3.2 Gb/sGen1—
XC6SLX7546,648 LUT674.6K LC1323 Mb408———
XC6SLX75T46,648 LUT674.6K LC1323 Mb3488 GTP 3.2 Gb/sGen1—
XC6SLX10063,288 LUT6101K LC1804.7 Mb480———
XC6SLX100T63,288 LUT6101K LC1804.7 Mb4988 GTP 3.2 Gb/sGen1—
XC6SLX15092,152 LUT6147K LC1804.7 Mb576———
XC6SLX150T92,152 LUT6147K LC1804.7 Mb5408 GTP 3.2 Gb/sGen1—

Source: Spartan-6 Family Overview, DS160 (v2.0). Data is extracted automatically from the vendor's selection guide; verify critical values in the device data sheet.