FPGA & adaptive SoC databook · online editionRev. 2026.10

FPGA finder: search and compare FPGAs by specs

Filter 496 FPGAs and SoC FPGAs from AMD, Altera, Cologne Chip, Efinix, Gowin, Lattice, Microchip and Renesas by logic, DSP, memory, I/O, transceivers, PCIe and hard processors. Logic is shown as the vendor publishes it, LUTs with their type (LUT4, LUT6, ALM or CPE), next to the CoreScore benchmark where it has been run. Every device links to a full spec sheet with packages and similar parts from other vendors.

496 devices61 familiesData from vendor selection guides
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DeviceLUTsVendor logicDSPBlock RAMI/OTransceiversPCIeHard IPCoreScoreProcess
T120Efinix Trion— 112K LEs, LUTs not published112KLE3205.3 Mb278———40 nm
T13Efinix Trion— 12.8K LEs, LUTs not published12.8KLE240.7 Mb195———40 nm
T20Efinix Trion— 19.7K LEs, LUTs not published19.7KLE361 Mb230———40 nm
T35Efinix Trion— 31.7K LEs, LUTs not published31.7KLE1201.4 Mb230———40 nm
T4Efinix Trion— 3.9K LEs, LUTs not published3.9KLE40.1 Mb55———40 nm
T55Efinix Trion— 54.2K LEs, LUTs not published54.2KLE1502.7 Mb278———40 nm
T8Efinix Trion— 7.4K LEs, LUTs not published7.4KLE80.1 Mb97——1740 nm
T85Efinix Trion— 84.1K LEs, LUTs not published84.1KLE2404 Mb278———40 nm
Ti1250Efinix Titanium— 1233K LEs, LUTs not published1233KLE2,38073.1 Mb48040SERDES 25.8 Gb/sGen4RISC-V RV64—16 nm
Ti140Efinix Titanium— 142K LEs, LUTs not published142KLE51010.6 Mb31016SERDES 16 Gb/sGen4RISC-V RV64—16 nm
Ti1600Efinix Titanium— 1578K LEs, LUTs not published1578KLE3,05093.6 Mb48040SERDES 25.8 Gb/sGen4RISC-V RV64—16 nm
Ti2000Efinix Titanium— 1974K LEs, LUTs not published1974KLE3,808117 Mb48040SERDES 25.8 Gb/sGen4RISC-V RV64—16 nm
Ti260Efinix Titanium— 264K LEs, LUTs not published264KLE96019.7 Mb31016SERDES 16 Gb/sGen4RISC-V RV64—16 nm
Ti40Efinix Titanium— 38.9K LEs, LUTs not published38.9KLE1001.5 Mb183———16 nm
Ti450Efinix Titanium— 448K LEs, LUTs not published448KLE86226.6 Mb48024SERDES 25.8 Gb/sGen4RISC-V RV64—16 nm
Ti660Efinix Titanium— 657K LEs, LUTs not published657KLE1,26038.9 Mb48024SERDES 25.8 Gb/sGen4RISC-V RV64—16 nm
Ti70Efinix Titanium— 68.2K LEs, LUTs not published68.2KLE1602.6 Mb183———16 nm
Ti800Efinix Titanium— 796K LEs, LUTs not published796KLE1,53647.2 Mb48024SERDES 25.8 Gb/sGen4RISC-V RV64—16 nm
Ti95Efinix Titanium— 93.2K LEs, LUTs not published93.2KLE2104.5 Mb241———16 nm
LCMXO2-256Lattice MachXO2256 LUT4———55———65 nm
iCE40LP384Lattice iCE40 LP/HX/LM384 LUT4384LC——39———40 nm
LCMXO2-640Lattice MachXO2640 LUT4——0 Mb79———65 nm
LCMXO2-640ULattice MachXO2640 LUT4——0.1 Mb107———65 nm
LCMXO3L-640Lattice MachXO3640 LUT4——0.1 Mb104———
LCMXO3LF-640Lattice MachXO3640 LUT4——0.1 Mb104———
iCE40LP640Lattice iCE40 LP/HX/LM640 LUT4640LC—0 Mb10———40 nm
iCE40UL640Lattice iCE40 Ultra640 LUT4——0.1 Mb26———40 nm
LFMXO4-010Lattice MachXO4896 LUT41.1KLC—0.1 Mb105———
iCE40LM1KLattice iCE40 LP/HX/LM1,100 LUT41.1KLC—0.1 Mb39———40 nm
iCE5LP1KLattice iCE40 Ultra1,100 LUT4—20.1 Mb39———40 nm
SLG47910Renesas ForgeFPGA1,120 LUT5——0 Mb19———
GW1AN-1Gowin Arora1,152 LUT4——0.1 Mb120———55 nm
GW1AN-1SGowin Arora1,152 LUT4——0.1 Mb44———55 nm
GW1NZ-1Gowin LittleBee1,152 LUT4——0.1 Mb48———55 nm
iCE40UL1KLattice iCE40 Ultra1,248 LUT4——0.1 Mb26———40 nm
LCMXO2-1200Lattice MachXO21,280 LUT4——0.1 Mb107———65 nm
LCMXO2-1200ULattice MachXO21,280 LUT4——0.1 Mb206———65 nm
LFMXO4-015Lattice MachXO41,280 LUT41.6KLC—0.1 Mb204———
iCE40HX1KLattice iCE40 LP/HX/LM1,280 LUT41.3KLC—0.1 Mb98——240 nm
iCE40LP1KLattice iCE40 LP/HX/LM1,280 LUT41.3KLC—0.1 Mb97———40 nm
LCMXO3L-1300Lattice MachXO31,300 LUT4——0.1 Mb206———
LCMXO3LF-1300Lattice MachXO31,300 LUT4——0.1 Mb206———
GW1N-1P5Gowin LittleBee1,584 LUT4——0.1 Mb125———55 nm
10M02Altera MAX 102,000 LUT42KLE160.1 Mb246———55 nm
iCE40LM2KLattice iCE40 LP/HX/LM2,048 LUT42KLC—0.1 Mb39———40 nm
iCE5LP2KLattice iCE40 Ultra2,048 LUT4—40.1 Mb39———40 nm
LCMXO3L-2100Lattice MachXO32,100 LUT4——0.1 Mb279———
LCMXO3LF-2100Lattice MachXO32,100 LUT4——0.1 Mb279———
LCMXO2-2000Lattice MachXO22,112 LUT4——0.1 Mb206———65 nm
LCMXO2-2000ULattice MachXO22,112 LUT4——0.1 Mb278———65 nm
LFMXO4-025Lattice MachXO42,112 LUT42.6KLC—0.1 Mb204———
SLG47920Renesas ForgeFPGA2,240 LUT5——0.1 Mb32———
GW1N-2Gowin LittleBee2,304 LUT4——0.1 Mb125———55 nm
GW1NR-2Gowin LittleBee2,304 LUT4——0.1 Mb126———55 nm
GW1NZ-2Gowin LittleBee2,304 LUT4——0.1 Mb125———55 nm
iCE40UP3KLattice iCE40 UltraPlus2,800 LUT4—40.1 Mb21———40 nm
LFMXO4D-040Lattice MachXO43,000 LUT43.6KLC—0.1 Mb204———
GW1AN-3Gowin Arora3,200 LUT4——0.1 Mb208———55 nm
iCE40HX4KLattice iCE40 LP/HX/LM3,520 LUT43.5KLC—0.1 Mb109———40 nm
iCE40LM4KLattice iCE40 LP/HX/LM3,520 LUT43.5KLC—0.1 Mb39———40 nm
iCE40LP4KLattice iCE40 LP/HX/LM3,520 LUT43.5KLC—0.1 Mb180———40 nm
iCE5LP4KLattice iCE40 Ultra3,520 LUT4—40.1 Mb39———40 nm
XC7S6AMD Spartan-73,752 LUT66KLC100.2 Mb100———28 nm
10M04Altera MAX 104,000 LUT44KLE200.2 Mb246———55 nm
LCMXO3D-4300Lattice MachXO3D4,300 LUT4——0.1 Mb206———
LCMXO3L-4300Lattice MachXO34,300 LUT4——0.1 Mb335———
LCMXO3LF-4300Lattice MachXO34,300 LUT4——0.1 Mb335———
LCMXO2-4000Lattice MachXO24,320 LUT4——0.1 Mb278———65 nm
LFMXO4-050Lattice MachXO44,320 LUT45.2KLC—0.1 Mb333———
LFMXO4D-050Lattice MachXO44,320 LUT45.2KLC—0.1 Mb204———
GW1NRF-4BGowin LittleBee4,606 LUT4—160.2 Mb25——ARC (32-bit)—55 nm
GW1N-4Gowin LittleBee4,608 LUT4—160.2 Mb218———55 nm
GW1NR-4Gowin LittleBee4,608 LUT4—160.2 Mb218———55 nm
GW1NS-4Gowin LittleBee4,608 LUT4—160.2 Mb106———55 nm
GW1NS-4CGowin LittleBee4,608 LUT4—160.2 Mb106——Cortex-M3—55 nm
GW1NSR-4Gowin LittleBee4,608 LUT4—160.2 Mb106———55 nm
GW1NSR-4CGowin LittleBee4,608 LUT4—160.2 Mb106——Cortex-M3—55 nm
XCSU10PAMD Spartan UltraScale+5,000 LUT611KSLC241.7 Mb304———16 nm
iCE40UP5KLattice iCE40 UltraPlus5,280 LUT4—80.1 Mb39——1040 nm
GW1AN-5Gowin Arora5,408 LUT4——0.1 Mb208———55 nm
10CL006Altera Cyclone 10 LP6,000 LUT46KLE150.3 Mb176———60 nm
EP4CE6Altera Cyclone IV6,000 LUT46KLE150.3 Mb179———60 nm
M2GL005Microchip IGLOO26,060 LUT46.1KLE110.2 Mb209———65 nm
M2S005Microchip SmartFusion26,060 LUT46.1KLE110.2 Mb209——Cortex-M3—65 nm
LCMXO2-7000Lattice MachXO26,864 LUT4——0.2 Mb334———65 nm
LFMXO4-080Lattice MachXO46,864 LUT48.3KLC—0.2 Mb333———
LFMXO4D-080Lattice MachXO46,864 LUT48.3KLC—0.2 Mb333———
LCMXO3L-6900Lattice MachXO36,900 LUT4——0.2 Mb335———
LCMXO3LF-6900Lattice MachXO36,900 LUT4——0.2 Mb335———
GW3AT-6Gowin Arora III6,912 LUT4——0.3 Mb701SERDES 8.5 Gb/s——
LFD2NX-9Lattice Certus-NX7,500 LUT49KLC120.3 Mb77———28 nm
iCE40HX8KLattice iCE40 LP/HX/LM7,680 LUT47.7KLC—0.1 Mb208——1240 nm
iCE40LP8KLattice iCE40 LP/HX/LM7,680 LUT47.7KLC—0.1 Mb180——1140 nm
10M08Altera MAX 108,000 LUT48KLE240.4 Mb250——2055 nm
XC7A12TAMD Artix-78,000 LUT612.8KLC400.7 Mb1502GTP 6.6 Gb/sGen2—28 nm
XC7S15AMD Spartan-78,000 LUT612.8KLC200.4 Mb100———28 nm
A3C 025Altera Agilex 38,500 ALMs25.1KLE341.3 Mb256——Cortex-A55—Intel 7
GW1N-9Gowin LittleBee8,640 LUT4—200.5 Mb276———55 nm
GW1NR-9Gowin LittleBee8,640 LUT4—200.5 Mb276———55 nm
LCMXO3D-9400Lattice MachXO3D9,400 LUT4——0.4 Mb383———

Browse FPGAs

AMD FPGAs

Altera FPGAs

Cologne Chip FPGAs

Efinix FPGAs

Gowin FPGAs

Lattice FPGAs

Microchip FPGAs

Renesas FPGAs

By feature

Also: head-to-head comparisons, how vendors count logic, the CoreScore ranking and the JSON API.

How to choose an FPGA

Start from the resources your design really needs. Logic is measured in look-up tables (LUTs), but not all LUTs are equal: AMD uses 6-input LUTs, Altera uses adaptive logic modules (ALMs, fracturable 8-input LUTs), Cologne Chip uses 8-input LUT trees (CPEs), while Lattice, Microchip, Efinix and Gowin use 4-input LUTs. Vendors also quote "logic cells", "logic elements" or "system logic cells", marketing units with different factors for each vendor. That is why this finder shows the LUT count with its type, explained in how vendors count logic, and the CoreScore result (how many SERV RISC-V cores really fit) where available. Arithmetic-heavy designs such as filters, FFTs or neural networks are limited by DSP slices, and buffering or video line storage by block RAM.

Then look at I/O and connectivity. Count the user I/O pins in the package you can actually route, not the family maximum, and check whether you need multi-gigabit transceivers, a hard PCI Express block or a memory controller. If the design needs Linux or a real-time processor, an adaptive SoC with hard Arm cores saves board space and power compared with a soft CPU.

Finally, leave margin: 60–70 % utilization keeps timing closure manageable and leaves room for debug cores and future features. Check the package pitch for your PCB process, the temperature grade for the target environment and whether the free edition of the vendor's tools supports the device.